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path: root/src/arch/mips
AgeCommit message (Expand)Author
2009-04-08tlb: More fixing of unified TLBNathan Binkert
2009-04-08tlb: Don't separate the TLB classes into an instruction TLB and a data TLBGabe Black
2009-03-05stats: Fix all stats usages to deal with template fixesNathan Binkert
2009-03-05Get rid of 'using namespace' declarations in headers.Steve Reinhardt
2009-02-28Fix Num_Syscall_Descs check bug in non-x86 ISAs.Steve Reinhardt
2009-02-27Processes: Make getting and setting system call arguments part of a process o...Gabe Black
2009-02-25ISA: Get rid of the get*RegName functions.Gabe Black
2009-02-25CPU: Implement translateTiming which defers to translateAtomic, and convert t...Gabe Black
2009-02-25ISA: Replace the translate functions in the TLBs with translateAtomic.Gabe Black
2009-02-20Remove unnecessary building of FreeList/RenameMap in InOrder. Clean-up commen...Korey Sewell
2009-02-16sycalls: implement mremap() and add DATA flag for getrlimit(). mremap has bee...Lisa Hsu
2009-02-10syscall: Expose ioctl for MIPSKorey Sewell
2009-01-13SCons: centralize the Dir() workaround for newer versions of scons.Nathan Binkert
2008-11-15syscalls: fix latent brk/obreak bug.Steve Reinhardt
2008-11-14Fix a bunch of bugs I introduced when I changed the flags stuff for packets.Nathan Binkert
2008-11-10mem: update stuff for changes to Packet and RequestNathan Binkert
2008-11-04get rid of all instances of readTid() and getThreadNum(). Unify and eliminateLisa Hsu
2008-11-02Add in Context IDs to the simulator. From now on, cpuId is almost never used,Lisa Hsu
2008-11-02make BaseCPU the provider of _cpuId, and cpuId() instead of being scatteredLisa Hsu
2008-10-21style: Use the correct m5 style for things relating to interrupts.Nathan Binkert
2008-10-12Get rid of old RegContext code.Gabe Black
2008-10-12CPU: Create a microcode ROM object in the CPU which is defined by the ISA.Gabe Black
2008-10-12Turn Interrupts objects into SimObjects. Also, move local APIC state into x86...Gabe Black
2008-10-12CPU: Eliminate the get_vec function.Gabe Black
2008-10-10TLB: Make all tlbs derive from a common base class in both python and C++.Gabe Black
2008-10-09SimObjects: Clean up handling of C++ namespaces.Nathan Binkert
2008-10-09eventq: convert all usage of events to use the new API.Nathan Binkert
2008-10-09O3: Generaize the O3 dynamic instruction class so it isn't split out by ISA.Gabe Black
2008-10-06fix shadow set bugs in MIPS code that caused out of bounds access...Korey Sewell
2008-09-27gcc: Add extra parens to quell warnings.Nathan Binkert
2008-09-27arch: TheISA shouldn't really ever be used in the arch directory.Nathan Binkert
2008-09-27alpha: Get rid fo the namespace called EV5.Nathan Binkert
2008-09-26style: missed space after switchNathan Binkert
2008-09-26Use logical operator instead of bitwise operator for correctness.Nathan Binkert
2008-09-26style: These files didn't even come close to following the M5 style guide.Nathan Binkert
2008-09-10style: Remove non-leading tabs everywhere they shouldn't be. Developers shoul...Ali Saidi
2008-09-09style: this file did not conform to styleNathan Binkert
2008-08-11styleNathan Binkert
2008-08-11params: Convert the CPU objects to use the auto generated param structs.Nathan Binkert
2008-07-23syscalls: Add a bunch of missing system calls.Michael Adler
2008-07-01Remove delVirtPort() and make getVirtPort() only return cached version.Ali Saidi
2008-07-01Change everything to use the cached virtPort rather than created their own ea...Ali Saidi
2008-06-14Fix various SWIG warningsNathan Binkert
2008-05-20SCons: Fixing SCons bug 2006 issues for non-alpha ISAsStephen Hines
2008-02-26TLB: Make a TLB base class and put a virtual demapPage function in it.Gabe Black
2008-02-06Make the Event::description() a const functionStephen Hines
2007-11-17add back in clobbered MIPS fix for g++ 4.2Korey Sewell
2007-11-16go back and fix up MIPS copyright headersKorey Sewell
2007-11-16move initCPU, processInterrupts declaration to core_specific file.Korey Sewell
2007-11-15remove unnecessary namespaceKorey Sewell
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