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AgeCommit message (Expand)Author
2010-02-12O3PCU: Split loads and stores that cross cache line boundaries.Timothy M. Jones
2009-12-31MIPS: Beef up process initialization.Matt DeVuyst
2009-12-31MIPS: Implement the SE mode version of rdhwr.Gabe Black
2009-12-31MIPS: Fix decoding of the rdhwr instruction.Gabe Black
2009-12-31MIPS: Implement the set_thread_area system call.Gabe Black
2009-12-31MIPS: Create an artificial control register to hold the thread pointer.Gabe Black
2009-12-31MIPS: Extract CPU pointer from the thread context in scheduleCP0 setMiscReg.Gabe Black
2009-12-21MIPS: Add missing syscall slots.Gabe Black
2009-11-10Mem: Eliminate the NO_FAULT request flag.Gabe Black
2009-11-04build: fix compile problems pointed out by gcc 4.4Nathan Binkert
2009-10-30Syscalls: Make system calls access arguments like a stack, not an array.Gabe Black
2009-10-24syscall: Addition of an ioctl command code for Power.Timothy M. Jones
2009-10-17ISA: Fix compilation.Gabe Black
2009-09-22python: Move more code into m5.util allow SCons to use that code.Nathan Binkert
2009-09-17mips: fix command line argumentsKorey Sewell
2009-09-15Syscalls: Implement sysinfo() syscall.Vince Weaver
2009-07-31merge mips fix and statetrace changesKorey Sewell
2009-07-31mips: fix ll/sc pairs working incorrectly because of accidental clobber of LL...Korey Sewell
2009-07-30compile: fix accidental conversion of == into =Nathan Binkert
2009-07-22MIPS: Small fix I forgot to qrefresh into my last change.Gabe Black
2009-07-22MIPS: Style/formatting sweep of the decoder itself.Gabe Black
2009-07-21MIPS: Format the register index constants like the other ISAs.Gabe Black
2009-07-21MIPS: Get MIPS_FS to compile, more style fixes.Gabe Black
2009-07-21MIPS: Many style fixes.Gabe Black
2009-07-20MIPS: Use BitUnions instead of bits() functions and constants.Gabe Black
2009-07-10ISAs: Get rid of the IControl operand type.Gabe Black
2009-07-09MIPS: Fold the MiscRegFile all the way into the ISA object.Gabe Black
2009-07-08Get rid of the unused get(Data|Inst)Asid and (inst|data)Asid functions.Gabe Black
2009-07-08Registers: Add a registers.hh file as an ISA switched header.Gabe Black
2009-07-08Registers: Collapse ARM and MIPS regfile directories.Gabe Black
2009-07-08Registers: Eliminate the ISA defined RegFile class.Gabe Black
2009-07-08Registers: Move the PCs out of the ISAs and into the CPUs.Gabe Black
2009-07-08MIPS: Get rid of an orphaned MIPS .cc file.Gabe Black
2009-07-08MIPS: Phase out MIPS's int_regfile.hh.Gabe Black
2009-07-08Registers: Eliminate the ISA defined integer register file.Gabe Black
2009-07-08Registers: Eliminate the ISA defined floating point register file.Gabe Black
2009-07-08Registers: Get rid of the float register width parameter.Gabe Black
2009-07-08Registers: Add an ISA object which replaces the MiscRegFile.Gabe Black
2009-05-26types: add a type for thread IDs and try to use it everywhereNathan Binkert
2009-05-17includes: sort includes againNathan Binkert
2009-05-17types: Move stuff for global types into src/base/types.hhNathan Binkert
2009-05-13inorder-mips: Remove eaComp & memAcc; use 'visible' eaCompKorey Sewell
2009-05-13arch-mips: add regWidth constant to float regfileKorey Sewell
2009-05-12inorder-alpha-port: initial inorder support of ALPHAKorey Sewell
2009-04-21syscall: Resolve conflicts between m5threads and Gabe's recent SE changes.Steve Reinhardt
2009-04-19Memory: Rename LOCKED for load locked store conditional to LLSC.Gabe Black
2009-04-18mips-tlb-fix: check for alignment faults.\nMIPS was never updated to use TLBS...Korey Sewell
2009-04-18mips-syscall: mark with correct flag. \nMIPS was using wrong serialization fl...Korey Sewell
2009-04-18o3-delay-slot-bpred: fix decode stage handling of uncdtl. branches.\n decode ...Korey Sewell
2009-04-18mips-shadowsets: fix calcuations. \n Remove Shadowsets from Int & Arch. Reg ...Korey Sewell