Age | Commit message (Expand) | Author |
2007-10-16 | Make the process objects use the Params structs in their constructors, and us... | Gabe Black |
2007-10-02 | Merge with head. | Gabe Black |
2007-10-02 | Predecoder: Clear out predecoder state on an ITLB fault. | Gabe Black |
2007-09-28 | Rename cycles() function to ticks() | Ali Saidi |
2007-09-19 | X86: Put in the foundation for x87 stack based fp registers. | Gabe Black |
2007-08-30 | params: Deprecate old-style constructors; update most SimObject constructors. | Miles Kaufmann |
2007-08-28 | Address translation: De-templatize the GenericTLB class. | Gabe Black |
2007-08-27 | MIPS: Fixes to get mips to compile. | Gabe Black |
2007-08-26 | Address translation: Make the page table more flexible. | Gabe Black |
2007-08-26 | Address Translation: Make SE mode use an actual TLB/MMU for translation like FS. | Gabe Black |
2007-08-01 | merge: mips fix to getArgument | Nathan Binkert |
2007-08-01 | mips: make getArgument inline so mips will link properly | Nathan Binkert |
2007-08-01 | Merge with head. | Gabe Black |
2007-08-01 | Merge with head. | Gabe Black |
2007-08-01 | MIPS: Files which are needed for the MIPS fix. | Gabe Black |
2007-08-01 | Merge with head. | Gabe Black |
2007-08-01 | Merge Gabe and my changes to arch/mips/utility.hh | Ali Saidi |
2007-08-01 | Arguments: Get rid of duplicate code for the Arguments class in each architec... | Ali Saidi |
2007-08-01 | MIPS: Cleaned up includes to break loops, and got rid of isa_traits.cc | Gabe Black |
2007-07-31 | Add a flag to indicate an instruction triggers a syscall in SE mode. | Gabe Black |
2007-07-26 | Merge python and x86 changes with cache branch | Nathan Binkert |
2007-07-26 | X86: Fix argument register indexing. | Gabe Black |
2007-07-22 | Merge more changes in from head. | Steve Reinhardt |
2007-07-18 | Make name, isMachineCheckFault, and isAlignmentFault const. | Gabe Black |
2007-06-30 | Event descriptions should not end in "event" | Steve Reinhardt |
2007-06-29 | fix store instructions, pass fast/quick Atomic/TimingSimpleCPU regressions... | Korey Sewell |
2007-06-28 | o3cpu build for mips | Korey Sewell |
2007-06-22 | mips import pt. 1 | Korey Sewell |
2007-06-19 | Make branches work by repopulating the predecoder every time through. This is... | Gabe Black |
2007-06-13 | Seperate the pc-pc and the pc of the incoming bytes, and get rid of the "more... | Gabe Black |
2007-03-15 | Merge zizzer.eecs.umich.edu:/bk/newmem | Gabe Black |
2007-03-15 | Make the predecoder an object with it's own switched header file. Start addin... | Gabe Black |
2007-03-13 | Replaced makeExtMI with predecode. | Gabe Black |
2007-03-10 | Rework the way SCons recurses into subdirectories, making it | Nathan Binkert |
2007-03-09 | implement ipi stufff for SPARC | Ali Saidi |
2007-03-07 | Move the magic m5 PageTableFault into sim/faults.[hh,cc] since it's the same ... | Gabe Black |
2007-03-07 | *MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscReg | Ali Saidi |
2007-03-04 | Don't use the exact same name as a system header #define | Nathan Binkert |
2007-02-13 | Update MIPS ISA description to work with new write result interface | Steve Reinhardt |
2007-02-13 | fix compiling problems | Ali Saidi |
2007-02-12 | rename store conditional stuff as extra data so it can be used for conditiona... | Ali Saidi |
2007-01-25 | Fixed a warning that was breaking compilation. | Gabe Black |
2006-12-21 | Stub for SE mode gdb support for MIPS. | Gabe Black |
2006-12-17 | Minor cleanup of new snippet/subst code. | Steve Reinhardt |
2006-12-17 | Convert Alpha (and finish converting MIPS) to new | Steve Reinhardt |
2006-12-17 | Started removing "CodeBlock" objects from the mips isa description. | Gabe Black |
2006-12-16 | Merge zizzer:/bk/newmem | Gabe Black |
2006-12-15 | Merge zizzer:/bk/sparcfs | Lisa Hsu |
2006-12-15 | some small general fixes to make everythign work nicely with other ISAs, now ... | Lisa Hsu |
2006-12-12 | Merge zizzer:/bk/newmem/ | Gabe Black |