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path: root/src/arch/power
AgeCommit message (Expand)Author
2019-05-30arch, base, cpu, gpu, sim: Merge getMemProxy and getVirtProxy.Gabe Black
2019-05-29sim-se: add a release parameter to Process.pyCiro Santilli
2019-05-29arch, base, dev, sim: Remove now unnecessary casts from PortProxy methods.Gabe Black
2019-05-21sim-se: change syscall function signatureBrandon Potter
2019-05-20power: Add an object file loader for linux.Gabe Black
2019-04-30arch: Stop using TheISA within the ISAs.Gabe Black
2019-04-28arch, sim: Simplify the AuxVector type.Gabe Black
2019-03-25arch-power: Rename program counter registersSandipan Das
2019-03-25arch-power: Simplify doubleword operand typesSandipan Das
2019-02-12python: Don't assume SimObjects live in the global namespaceAndreas Sandberg
2019-02-01cpu, arch: Replace the CCReg type with RegVal.Gabe Black
2019-01-31power: Get rid of some ISA specific register types.Gabe Black
2019-01-31arch: cpu: Rename *FloatRegBits* to *FloatReg*.Gabe Black
2019-01-30arch,cpu: Add vector predicate registersGiacomo Gabrielli
2019-01-24base: arch: Get rid of the now unused FloatRegVal type.Gabe Black
2019-01-22arch: cpu: Stop passing around misc registers by reference.Gabe Black
2019-01-22sim-se: add syscalls related to pollingBrandon Potter
2019-01-16arch: Make the ISA register types aliases for the global types.Gabe Black
2018-10-17arch: Get rid of the unused type AnyReg.Gabe Black
2018-09-19syscall_emul: expand AuxVector classBrandon Potter
2018-06-11misc: Using smart pointers for memory RequestsGiacomo Travaglini
2018-05-08arch-x86, arch-power: fix calls to bits and insertBitsMatt Sinclair
2018-03-26arch: Fix all override related warnings.Gabe Black
2018-03-26arch: Add a virtual asBytes function to the StaticInst class.Gabe Black
2018-01-20arch, mem: Make the page table lookup function return a pointer.Gabe Black
2018-01-20sim, arch, base: Refactor the base remote GDB class.Gabe Black
2018-01-19arch, mem, sim: Consolidate and rename the SE mode page table classes.Gabe Black
2018-01-15arch: Fix a fatal_if in most of the arch's process classes.Gabe Black
2018-01-11arm, power: Make the python TLB simobjects inherit from BaseTLB.Gabe Black
2018-01-11arch,mem: Remove the default value for page size.Gabe Black
2018-01-11arch,mem: Move page table construction into the arch classes.Gabe Black
2018-01-10style: change C/C++ source permissions to noexecBKP
2018-01-10alpha,arm,mips,power,riscv,sparc,x86,cpu: Get rid of ISA_HAS_DELAY_SLOT.Gabe Black
2018-01-09cpu, power: Get rid of the remnants of the EA computation insts.Gabe Black
2017-12-23alpha,arm,mips,power,riscv,sparc,x86: Get rid of TheISA::NoopMachInst.Gabe Black
2017-12-22arch,cpu: "virtualize" the TLB interface.Gabe Black
2017-12-13cpu,alpha,mips,power,riscv,sparc: Get rid of eaComp and memAccInst.Gabe Black
2017-12-04misc: Rename misc.(hh|cc) to logging.(hh|cc)Gabe Black
2017-11-07alpha,arm,mips,power,riscv,sparc,x86: Merge exec decl templates.Gabe Black
2017-11-02alpha,arm,mips,power,riscv,sparc,x86,isa: De-specialize ExecContexts.Gabe Black
2017-10-17scons: Stop generating inc.d in the isa parser.Gabe Black
2017-10-13mem: Signal the local monitor when clearing the global monitorNikos Nikoleris
2017-09-11stats: Get rid of some kernel stats related cruft.Gabe Black
2017-07-05cpu: Added interface for vector reg fileRekai Gonzalez-Alberquilla
2017-07-05cpu: Simplify the rename interface and use RegIdRekai Gonzalez-Alberquilla
2017-07-05arch, cpu: Architectural Register structural indexingNathanael Premillieu
2017-05-18base: Refactor the GDB code.Gabe Black
2017-03-09syscall-emul: Move memState into its own fileBrandon Potter
2017-02-27syscall_emul: [PATCH 15/22] add clone/execve for threading and multiprocess s...Brandon Potter
2015-07-20syscall_emul: [patch 13/22] add system call retry capabilityBrandon Potter