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path: root/src/arch/riscv/faults.hh
AgeCommit message (Expand)Author
2019-01-31riscv: Get rid of some ISA specific register types.Gabe Black
2019-01-16arch-riscv: Add interrupt handlingAlec Roelke
2019-01-16arch-riscv: Fix reset function and styleAlec Roelke
2018-07-28arch-riscv: Add xret instructionsAlec Roelke
2018-07-28arch-riscv: Add support for trap value registerAlec Roelke
2018-07-28arch-riscv: Add support for fault handlingAlec Roelke
2018-07-09arch-riscv: enable rudimentary fs simulationRobert
2017-07-14riscv: Fix bugs with RISC-V decoder and detailed CPUsAlec Roelke
2016-11-30riscv: [Patch 3/5] Added RISCV floating point extensions RV64FDAlec Roelke
2016-11-30arch: [Patch 1/5] Added RISC-V base instruction set RV64IAlec Roelke