| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2017-11-29 | arch-riscv: Move parts of mem insts out of ISA | Alec Roelke | |
| This patch moves static portions of the memory instructions out of the ISA generated code and puts them into arch/riscv/insts. It also simplifies the definitions of load and store instructions by giving them a common base class. Change-Id: Ic6930cbfc6bb02e4b3477521e57b093eac0c8803 Reviewed-on: https://gem5-review.googlesource.com/6024 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Alec Roelke <ar4jc@virginia.edu> | |||
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