| Age | Commit message (Expand) | Author |
|---|
| 2018-01-29 | riscv: Add overrides to various StaticInst methods. | Gabe Black |
| 2017-12-13 | cpu,alpha,mips,power,riscv,sparc: Get rid of eaComp and memAccInst. | Gabe Black |
| 2017-11-30 | arch-riscv: use sext rather than manual masks | Alec Roelke |
| 2017-11-30 | arch-riscv: Remove spaces around ea_code | Alec Roelke |
| 2017-11-29 | arch-riscv: Move parts of mem insts out of ISA | Alec Roelke |
| 2017-11-07 | alpha,arm,mips,power,riscv,sparc,x86: Merge exec decl templates. | Gabe Black |
| 2017-11-02 | alpha,arm,mips,power,riscv,sparc,x86,isa: De-specialize ExecContexts. | Gabe Black |
| 2017-07-11 | arch-riscv: Add support for compressed extension RV64C | Alec Roelke |
| 2017-07-11 | arch-riscv: Restructure ISA description | Alec Roelke |
| 2017-04-05 | riscv: fix Linux problems with LR and SC ops | Alec Roelke |
| 2016-11-30 | riscv: [Patch 7/5] Corrected LRSC semantics | Alec Roelke |
| 2016-11-30 | riscv: [Patch 4/5] Added RISC-V atomic memory extension RV64A | Alec Roelke |
| 2016-11-30 | arch: [Patch 1/5] Added RISC-V base instruction set RV64I | Alec Roelke |
