summaryrefslogtreecommitdiff
path: root/src/arch/riscv
AgeCommit message (Expand)Author
2018-07-28arch-riscv: Add xret instructionsAlec Roelke
2018-07-28arch-riscv: Add support for trap value registerAlec Roelke
2018-07-28arch-riscv: Add support for fault handlingAlec Roelke
2018-07-09arch-riscv: enable rudimentary fs simulationRobert
2018-07-09arch-riscv: Fix the srlw and srliw instructions.Austin Harris
2018-06-11misc: Using smart pointers for memory RequestsGiacomo Travaglini
2018-06-11misc: Substitute pointer to Request with aliased RequestPtrGiacomo Travaglini
2018-05-12arch-riscv: Update CSR implementationsAlec Roelke
2018-03-27arch: cpu: Make the ExtMachInst type a template argument in InstMap.Gabe Black
2018-03-26arch: Fix all override related warnings.Gabe Black
2018-03-26arch: Add a virtual asBytes function to the StaticInst class.Gabe Black
2018-03-20riscv: throw IllegalInstFault when decoding invalid instructionsTuan Ta
2018-02-19arch-riscv: Fix compressed branch op offsetAlec Roelke
2018-01-29riscv: Add overrides to various StaticInst methods.Gabe Black
2018-01-20arch, mem: Make the page table lookup function return a pointer.Gabe Black
2018-01-20sim, arch, base: Refactor the base remote GDB class.Gabe Black
2018-01-19arch, mem, sim: Consolidate and rename the SE mode page table classes.Gabe Black
2018-01-16arch-riscv: Fix floating-poing op classesAlec Roelke
2018-01-16arch-riscv: Fix floating-point conversion bugsAlec Roelke
2018-01-15arch: Fix a fatal_if in most of the arch's process classes.Gabe Black
2018-01-11arch-riscv: Don't crash when printing unknown CSRsAlec Roelke
2018-01-11arch,mem: Remove the default value for page size.Gabe Black
2018-01-11arch,mem: Move page table construction into the arch classes.Gabe Black
2018-01-10arch-riscv: Make use of ImmOp's polymorphismAlec Roelke
2018-01-10alpha,arm,mips,power,riscv,sparc,x86,cpu: Get rid of ISA_HAS_DELAY_SLOT.Gabe Black
2018-01-05arch-riscv: Ignore sched_yield syscall in SE modeTuan Ta
2018-01-05arch-riscv: Ignore set_robust_list and get_robust_list syscallsTuan Ta
2018-01-05arch-riscv: Add an implementation of set_tid_address syscall in RISCVTuan Ta
2018-01-05arch-riscv: Correct syscall argument reg countAlec Roelke
2018-01-04arch-riscv: Remove "magic" syscall number constantAlec Roelke
2017-12-23alpha,arm,mips,power,riscv,sparc,x86: Get rid of TheISA::NoopMachInst.Gabe Black
2017-12-23riscv,x86: Stop using the arch Nop machine instruction unnecessarily.Gabe Black
2017-12-22arch,cpu: "virtualize" the TLB interface.Gabe Black
2017-12-14arch-riscv: Define AT_RANDOM properlyAlec Roelke
2017-12-14arch-riscv: Increase maximum stack sizeAlec Roelke
2017-12-13cpu,alpha,mips,power,riscv,sparc: Get rid of eaComp and memAccInst.Gabe Black
2017-12-07arch-riscv: Move compressed ops out of ISAAlec Roelke
2017-12-04misc: Rename misc.(hh|cc) to logging.(hh|cc)Gabe Black
2017-11-30arch-riscv: use sext rather than manual masksAlec Roelke
2017-11-30arch-riscv: Remove spaces around ea_codeAlec Roelke
2017-11-29arch-riscv: Add missing license paragraphsAlec Roelke
2017-11-29arch-riscv: Remove static parts of AMOs out of ISAAlec Roelke
2017-11-29arch-riscv: Move parts of mem insts out of ISAAlec Roelke
2017-11-29arch-riscv: Move unknown out of ISA descriptionAlec Roelke
2017-11-29arch-riscv: Move standard ops out of ISAAlec Roelke
2017-11-28arch-riscv: Move static_inst into a directoryAlec Roelke
2017-11-22arch-riscv: Add missing system callsAlec Roelke
2017-11-07alpha,arm,mips,power,riscv,sparc,x86: Merge exec decl templates.Gabe Black
2017-11-02alpha,arm,mips,power,riscv,sparc,x86,isa: De-specialize ExecContexts.Gabe Black
2017-10-17scons: Stop generating inc.d in the isa parser.Gabe Black