summaryrefslogtreecommitdiff
path: root/src/arch/riscv
AgeCommit message (Expand)Author
2017-11-22arch-riscv: Add missing system callsAlec Roelke
2017-11-07alpha,arm,mips,power,riscv,sparc,x86: Merge exec decl templates.Gabe Black
2017-11-02alpha,arm,mips,power,riscv,sparc,x86,isa: De-specialize ExecContexts.Gabe Black
2017-10-17scons: Stop generating inc.d in the isa parser.Gabe Black
2017-10-13mem: Signal the local monitor when clearing the global monitorNikos Nikoleris
2017-09-11stats: Get rid of some kernel stats related cruft.Gabe Black
2017-07-17riscv: Define register index constants using literalsAlec Roelke
2017-07-14riscv: Disambiguate between the C and C++ versions of isnan and isinf.Gabe Black
2017-07-14riscv: Fix bugs with RISC-V decoder and detailed CPUsAlec Roelke
2017-07-14riscv: Add unused attribute to some registers.hh constantsAlec Roelke
2017-07-11arch-riscv: Add support for compressed extension RV64CAlec Roelke
2017-07-11arch-riscv: Restructure ISA descriptionAlec Roelke
2017-07-05cpu: Added interface for vector reg fileRekai Gonzalez-Alberquilla
2017-07-05cpu: Simplify the rename interface and use RegIdRekai Gonzalez-Alberquilla
2017-07-05arch, cpu: Architectural Register structural indexingNathanael Premillieu
2017-05-23arch-riscv: Fix bad stack initializationAlec Roelke
2017-05-18base: Refactor the GDB code.Gabe Black
2017-05-18syscall_emul, riscv: add override keyword to RISCV Process classBrandon Potter
2017-04-11riscv: Fix crashes with large or frequent mmapsAlec Roelke
2017-04-05riscv: fix Linux problems with LR and SC opsAlec Roelke
2017-04-05riscv: fix compatibility with Linux toolchainAlec Roelke
2017-04-05riscv: add remote gdb supportAlec Roelke
2017-04-05riscv: fix error on memory op address overflowAlec Roelke
2017-04-05riscv: enable unaligned memory accessesAlec Roelke
2017-03-09syscall-emul: Rewrite system call exit codeBrandon Potter
2017-03-09syscall-emul: Move memState into its own fileBrandon Potter
2017-02-27syscall_emul: [PATCH 15/22] add clone/execve for threading and multiprocess s...Brandon Potter
2015-07-20syscall_emul: [patch 13/22] add system call retry capabilityBrandon Potter
2016-11-09syscall_emul: [patch 8/22] refactor process classBrandon Potter
2016-11-09syscall_emul: [patch 5/22] remove LiveProcess class and use Process insteadBrandon Potter
2017-01-27riscv: Fix crash when syscall argument reg index is too highAlec Roelke
2016-11-09style: [patch 3/22] reduce include dependencies in some headersBrandon Potter
2016-11-09syscall_emul: [patch 2/22] move SyscallDesc into its own .hh and .ccBrandon Potter
2016-11-30riscv: [Patch 7/5] Corrected LRSC semanticsAlec Roelke
2016-11-30riscv: [Patch 6/5] Improve Linux emulation for RISC-VAlec Roelke
2016-11-30riscv: [Patch 5/5] Added missing support for timing CPU modelsAlec Roelke
2016-11-30riscv: [Patch 4/5] Added RISC-V atomic memory extension RV64AAlec Roelke
2016-11-30riscv: [Patch 3/5] Added RISCV floating point extensions RV64FDAlec Roelke
2016-11-30riscv: [Patch 2/5] Added RISC-V multiply extension RV64MAlec Roelke
2016-11-30arch: [Patch 1/5] Added RISC-V base instruction set RV64IAlec Roelke