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path: root/src/arch/sparc/interrupts.hh
AgeCommit message (Expand)Author
2015-07-07sim: Refactor the serialization base classAndreas Sandberg
2014-10-16arch: Use shared_ptr for all FaultsAndreas Hansson
2012-02-11SPARC: Make PSTATE and HPSTATE a BitUnion.Gabe Black
2011-04-15trace: reimplement the DTRACE function so it doesn't use a vectorNathan Binkert
2010-11-11SPARC: Clean up some historical style issues.Gabe Black
2009-07-09SPARC: Fold the MiscRegFile all the way into the ISA object.Gabe Black
2009-07-08SPARC: Phase out SPARC's intregfile.hh.Gabe Black
2009-01-25CPU: Add a setCPU function to the interrupt objects.Gabe Black
2008-10-21style: Use the correct m5 style for things relating to interrupts.Nathan Binkert
2008-10-12Turn Interrupts objects into SimObjects. Also, move local APIC state into x86...Gabe Black
2007-03-07*MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscRegAli Saidi
2007-03-03Implement Niagara I/O interface and rework interruptsAli Saidi
2007-02-06merge my index fix and lisa's fixAli Saidi
2007-02-02make interrupt code serialize itself and fix indentingAli Saidi
2007-02-01only increment numPosted if an interrupt of that type hasn't been posted before.Lisa Hsu
2007-01-19some hstick and hintp changes.Lisa Hsu
2007-01-11Add Trap Level Zero to interrupts, remove some unreachable code that I forgot...Lisa Hsu
2007-01-08the way i understand it, interrupts in m5 is a little bloated. the usage of ...Lisa Hsu
2006-12-08mostly implemented SOFTINT relevant interrupt stuff.Lisa Hsu
2006-11-14interrupts.hh:Lisa Hsu
2006-11-06Stub for SPARC interrupt handling object.Gabe Black