gem5 - gem5

Age	Commit message (Collapse)	Author
2007-01-30	Make SPARC checkpointing work	Ali Saidi
	src/arch/sparc/floatregfile.cc: Fix serialization for fpreg src/arch/sparc/intregfile.cc: fix serialization for intreg src/arch/sparc/miscregfile.cc: fix serialization from miscreg src/arch/sparc/pagetable.cc: fix serialization for page table src/arch/sparc/regfile.cc: need to serialize nnpc src/arch/sparc/tlb.cc: write serialization code for tlb src/cpu/base.cc: provide a way to find the thread number a context is serialize the instruction counter src/cpu/base.hh: provide a way to find the thread number a context is and given a thread number find a context pointer src/cpu/cpuevent.hh: provide method to get thread context from a cpu event for serialization src/dev/sparc/t1000.cc: src/dev/sparc/t1000.hh: nothing to serialize in t1000 src/sim/serialize.cc: src/sim/serialize.hh: Make findObj() work (it hasn't since we did the python conversion stuff) --HG-- extra : convert_revision : a95bc4e3c3354304171efbe3797556fdb146bea2
2007-01-22	Merge zizzer.eecs.umich.edu:/bk/newmem	Gabe Black
	into ewok.(none):/home/gblack/m5/newmemo3 src/sim/byteswap.hh: Hand Merge --HG-- extra : convert_revision : 640d33ad0c416934e8a5107768e7f1dce6709ca8
2007-01-10	bug fixes to get us to 145m instructions	Ali Saidi
	src/arch/sparc/intregfile.cc: some checks to make sure that the cwp and global register flattening stuff is working. These things have caught a couple of bugs so I think it would be good to keep them around at least for now src/arch/sparc/isa/decoder.isa: fix smul instruction to write Y correctly src/arch/sparc/miscregfile.cc: legion always returns du and dl set, so we need to emulate that for now at least --HG-- extra : convert_revision : 82f9276340888f1e43071c69504486efdcfdb3a8
2006-12-06	Changed the integer register file to work with flattened indices.	Gabe Black
	--HG-- extra : convert_revision : c5153c3c712e5d18b5233e1fd205806adcb30654
2006-11-24	Fix an include problem.	Gabe Black
	--HG-- extra : convert_revision : 89be55bd3f4f9b452a680a98b69ce42b80546769
2006-11-22	Moved some constants from isa_traits.hh to the reg file headers.	Gabe Black
	--HG-- extra : convert_revision : 378b2d9791e6282539900a2261ad2275d726b4be
2006-11-10	Tweaked debug output.	Gabe Black
	--HG-- extra : convert_revision : cd33b7c1ebdbefd42f18c1435b2519d06d9914a6
2006-11-04	fixes so that M5 will compile under solaris	Ali Saidi
	SConstruct: Add check to see if we need to include libsocket src/arch/sparc/floatregfile.cc: src/arch/sparc/intregfile.cc: use memset rather than bzero and include the appropriate headerfile src/base/pollevent.cc: If we're compling under solaris we need sys/file.h src/base/random.cc: src/base/random.hh: solaris doesn't have random(), so use rint with the correct rounding mode if we're compiling on solaris src/base/stats/flags.hh: u_int32_t?? src/base/time.hh: grab the timersub() define from freebsd since it doesn't exist in solaris src/cpu/inst_seq.hh: we don't need to include stdint here src/sim/byteswap.hh: the method to detect endianness on Solaris is a little more complex... --HG-- extra : convert_revision : 6b7db0e900e7bccfc250d65c125065f27280dda1
2006-10-29	Add an integer microcode register.	Gabe Black
	--HG-- extra : convert_revision : f23dbfdfe44e8e6cdd6948000669ad4f743b9fb4
2006-08-21	Fixed the parameters to memset. sizeof(regSegments[x]) may have been ↵	Gabe Black
	returning the size of a pointer to an IntReg --HG-- extra : convert_revision : 02c04ffceb447b7683ba5ebd4752819d0014cc19
2006-08-11	Pushed most of constants.hh back into isa_traits.hh and regfile.hh and ↵	Gabe Black
	created a seperate file for the syscallreturn class. --HG-- extra : convert_revision : 9507ea1c09fda959f00aec9ec8ffb887ec8dd0f9