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path: root/src/arch/sparc/isa/operands.isa
AgeCommit message (Expand)Author
2007-04-22Make the GSR into a renamed control register. It should be split into a renam...Gabe Black
2007-04-14Make the fsr a serializing register. Other control registers probably need th...Gabe Black
2007-04-11Create a filter and a union to translate the SPARC instruction implementation...Gabe Black
2007-03-02make ldtw(a) -- Twin 32 bit load work correctly -- by doing it the same way a...Ali Saidi
2007-02-24make m5 readfile work on solaris... we can have a solaris regression soon!Ali Saidi
2007-02-21add pseduo instruction support for sparcAli Saidi
2007-02-12rename store conditional stuff as extra data so it can be used for conditiona...Ali Saidi
2007-01-29Fix the Frs?s operands to use single width by default, rather than double width.Gabe Black
2006-12-17Merge zizzer:/bk/newmemGabe Black
2006-12-16Support for twin loads.Gabe Black
2006-12-16Made changes to CWP be non speculative.Gabe Black
2006-12-05Move the SyscallReturn class into sim/syscallreturn.hh. Also move some miscre...Gabe Black
2006-11-23Fixes to the isa description.Gabe Black
2006-11-10Added StrandStsReg operand.Gabe Black
2006-11-10Fix up instructions to read and write control registers, and got rid of the c...Gabe Black
2006-10-29Add an integer microcode register.Gabe Black
2006-10-25Fixed the priv instruction format.Gabe Black
2006-10-23Broke Load/Store instructions into microcode, and partially refactored memory...Gabe Black
2006-10-18Zeroed out the actual LSB in addition to moving it's original value the MSB.Gabe Black
2006-10-16Changed how floating point register numbers are decoded to fit with the spec.Gabe Black
2006-10-12Some support for handling block loads and stores and ASIs properly.Gabe Black
2006-07-26Now ignore sigactionGabe Black
2006-07-22Fixed subtract with carry, and started some work with floating point.Gabe Black
2006-05-26Implement PR/HPR/ASR for full systemAli Saidi
2006-05-22New directory structure:Steve Reinhardt