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path: root/src/arch/sparc/isa
AgeCommit message (Expand)Author
2010-12-20Style: Replace some tabs with spaces.Gabe Black
2010-12-08SPARC: Take advantage of new PCState syntax.Gabe Black
2010-12-07O3: Support squashing all state after special instructionAli Saidi
2010-11-11SPARC: Clean up some historical style issues.Gabe Black
2010-10-31ISA,CPU,etc: Create an ISA defined PC type that abstracts out ISA behaviors.Gabe Black
2010-10-22ISA: Simplify various implementations of completeAcc.Gabe Black
2010-05-14SPARC: Implement the version of movcc that uses the fp condition codes.Gabe Black
2009-09-15SPARC: Make resTemp in udivcc wide enough to hold all the bits we need.Vince Weaver
2009-07-08Registers: Add a registers.hh file as an ISA switched header.Gabe Black
2009-02-25SPARC: Adjust a few instructions to not write registers in initiateAcc.Gabe Black
2008-11-10mem: update stuff for changes to Packet and RequestNathan Binkert
2008-09-27gcc: Add extra parens to quell warnings.Nathan Binkert
2007-10-31String constant const-ness changes to placate g++ 4.2.Steve Reinhardt
2007-09-25SPARC: Remove parameter that was only ever set to one value.Gabe Black
2007-09-25SPARC: Remove some redundant code from some of the fp instructions.Gabe Black
2007-09-25SPARC: Clean up of privileged instructions.Gabe Black
2007-09-25SPARC: Long overdue cleanup of the condition code handlers.Gabe Black
2007-09-25SPARC: Clean up the branch instructions a bit.Gabe Black
2007-08-13SPARC: Make nops have the IsNop flag set.Gabe Black
2007-07-31Add a flag to indicate an instruction triggers a syscall in SE mode.Gabe Black
2007-06-19Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
2007-06-12Make microOp vs microop and macroOp vs macroop capitilization consistent.Gabe Black
2007-05-09Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
2007-05-08Add a hack to truncate addresses to 32 bits in SE. Paging should be changed t...Gabe Black
2007-04-27gcc 4.1 claims that mem_data might be used uninitialized,Nathan Binkert
2007-04-23Merge zizzer.eecs.umich.edu:/n/wexford/x/gblack/m5/newmem-o3-specGabe Black
2007-04-23Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmemGabe Black
2007-04-22Make the GSR into a renamed control register. It should be split into a renam...Gabe Black
2007-04-21create base/fenv.c to standerdize fenv across platforms. It's a c file and no...Ali Saidi
2007-04-14Make the fsr a serializing register. Other control registers probably need th...Gabe Black
2007-04-11Make trying to execute macroops fail with a better error message.Gabe Black
2007-04-11Create a filter and a union to translate the SPARC instruction implementation...Gabe Black
2007-04-08Get the "hard" SPARC instructions working in o3. I don't like that the IsStor...Gabe Black
2007-03-17The syntax used for twin stores was confusing the parser so it's now broken d...Gabe Black
2007-03-16Make the SPARC branch instructions use ExtMachInsts in their constructors. Th...Gabe Black
2007-03-12Fix mulscc.Gabe Black
2007-03-12Fix the mnemonic and the branch displacement field size of the branch on floa...Gabe Black
2007-03-11Make sttw and sttwa use the twin memory operations.Gabe Black
2007-03-10Added implementations of the fpop2 instructions.Gabe Black
2007-03-09implement ipi stufff for SPARCAli Saidi
2007-03-07*MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscRegAli Saidi
2007-03-02make ldtw(a) -- Twin 32 bit load work correctly -- by doing it the same way a...Ali Saidi
2007-02-28Make the m5 psuedo instructions use the BasicOperate formatGabe Black
2007-02-28Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
2007-02-28Make trap instructions always generate TrapInstruction Fault objects which ca...Gabe Black
2007-02-24Merge zizzer:/bk/newmemAli Saidi
2007-02-24make m5 readfile work on solaris... we can have a solaris regression soon!Ali Saidi
2007-02-23Ali and I both made the same change and we only need it once. I liked mine a ...Gabe Black
2007-02-23Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
2007-02-22Make the m5 pseudo instructions only work in FS. Also, make sure any undefine...Gabe Black
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