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path: root/src/arch/sparc/isa
AgeCommit message (Expand)Author
2007-05-08Add a hack to truncate addresses to 32 bits in SE. Paging should be changed t...Gabe Black
2007-04-27gcc 4.1 claims that mem_data might be used uninitialized,Nathan Binkert
2007-04-23Merge zizzer.eecs.umich.edu:/n/wexford/x/gblack/m5/newmem-o3-specGabe Black
2007-04-23Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmemGabe Black
2007-04-22Make the GSR into a renamed control register. It should be split into a renam...Gabe Black
2007-04-21create base/fenv.c to standerdize fenv across platforms. It's a c file and no...Ali Saidi
2007-04-14Make the fsr a serializing register. Other control registers probably need th...Gabe Black
2007-04-11Make trying to execute macroops fail with a better error message.Gabe Black
2007-04-11Create a filter and a union to translate the SPARC instruction implementation...Gabe Black
2007-04-08Get the "hard" SPARC instructions working in o3. I don't like that the IsStor...Gabe Black
2007-03-17The syntax used for twin stores was confusing the parser so it's now broken d...Gabe Black
2007-03-16Make the SPARC branch instructions use ExtMachInsts in their constructors. Th...Gabe Black
2007-03-12Fix mulscc.Gabe Black
2007-03-12Fix the mnemonic and the branch displacement field size of the branch on floa...Gabe Black
2007-03-11Make sttw and sttwa use the twin memory operations.Gabe Black
2007-03-10Added implementations of the fpop2 instructions.Gabe Black
2007-03-09implement ipi stufff for SPARCAli Saidi
2007-03-07*MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscRegAli Saidi
2007-03-02make ldtw(a) -- Twin 32 bit load work correctly -- by doing it the same way a...Ali Saidi
2007-02-28Make the m5 psuedo instructions use the BasicOperate formatGabe Black
2007-02-28Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
2007-02-28Make trap instructions always generate TrapInstruction Fault objects which ca...Gabe Black
2007-02-24Merge zizzer:/bk/newmemAli Saidi
2007-02-24make m5 readfile work on solaris... we can have a solaris regression soon!Ali Saidi
2007-02-23Ali and I both made the same change and we only need it once. I liked mine a ...Gabe Black
2007-02-23Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
2007-02-22Make the m5 pseudo instructions only work in FS. Also, make sure any undefine...Gabe Black
2007-02-22fix se compiling oopsAli Saidi
2007-02-21add pseduo instruction support for sparcAli Saidi
2007-02-12rename store conditional stuff as extra data so it can be used for conditiona...Ali Saidi
2007-02-06more fp fixesAli Saidi
2007-02-02more sparc fixesAli Saidi
2007-02-02fix mostly floating point relatedAli Saidi
2007-01-30Merge zizzer:/bk/newmemGabe Black
2007-01-30Implemented fbfss and fbpfcc instructions, and cleaned up branch code a little.Gabe Black
2007-01-30change std::isnan() to a using namespace std and isnan(). We need a better wa...Ali Saidi
2007-01-30use std:: for isnan() and fix decoding of fcmpe*Ali Saidi
2007-01-30Make the FpUnimpl format actually write the Fsr.Gabe Black
2007-01-30Added FpUnimpl format for quad precision and other purposefully unimplemented...Gabe Black
2007-01-29Fix the Frs?s operands to use single width by default, rather than double width.Gabe Black
2007-01-29Add implementation for the fcmp instructions. These don't behave -quite- righ...Gabe Black
2007-01-29Fix the FCMPCC bitfield.Gabe Black
2007-01-29Cleaned up disassembly a little.Gabe Black
2007-01-28Merge zizzer:/bk/newmemGabe Black
2007-01-28make unimplemented ops failAli Saidi
2007-01-27Merge zizzer:/bk/newmemGabe Black
2007-01-27Fixed up printReg so that control registers are printed by name. This is poss...Gabe Black
2007-01-26Merge zizzer:/bk/newmemAli Saidi
2007-01-26Make Sparc traceflag even more chattyAli Saidi
2007-01-26Merge zeep.pool:/z/saidi/work/m5.newmemAli Saidi
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