gem5 - gem5

Age	Commit message (Expand)	Author
2008-10-12	Get rid of old RegContext code.	Gabe Black
2008-10-09	eventq: convert all usage of events to use the new API.	Nathan Binkert
2008-09-27	arch: TheISA shouldn't really ever be used in the arch directory.	Nathan Binkert
2007-08-13	SPARC: Move tlb state into the tlb.	Gabe Black
2007-03-07	MiscReg->MiscRegNoEffect, MiscRegWithEffect->MiscReg	Ali Saidi
2007-03-03	Implement Niagara I/O interface and rework interrupts	Ali Saidi
2007-01-30	Make SPARC checkpointing work	Ali Saidi
2007-01-26	Fixed the number of integer registers. There are MaxGL+1 sets of globals, not...	Gabe Black
2007-01-22	Merge zizzer.eecs.umich.edu:/bk/newmem	Gabe Black
2007-01-20	fix InterruptLevel code to return the correct level	Ali Saidi
2006-12-16	Merge zizzer:/bk/newmem	Gabe Black
2006-12-06	Handle access to ASI_QUEUE	Ali Saidi
2006-12-06	Some changes for misc regs which were changed into unofficial integer registe...	Gabe Black
2006-11-24	Initial changes to get O3 working with SPARC	Gabe Black
2006-11-01	Adjustments for the AlphaTLB changing to AlphaISA::TLB and changing register ...	Gabe Black
2006-10-27	Made the regfile compatible with the new definitions in MiscRegFile	Gabe Black
2006-08-11	Pushed most of constants.hh back into isa_traits.hh and regfile.hh and create...	Gabe Black