index
:
gem5
hitsb
invisispec-1.0
invisispec-with-dift
is-ift
is-ift-cachehit
is-rebase
is-rebase-new
is-rebase-new2
is-rebase-new3-rdtscp
is-rebase04-linux3.2
is-rebase05
is-rebase06-RequestPtr
is-rebase07-GCC8
is-rebase08-QoSmem
is-rebase09-linuxarm-3.7.0
is-rebase10-DynInstPtr
is-rebase11-LSQUnit
is-rebase12
simple-object-demo
gem5
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
/
arch
/
sparc
/
regfile.hh
Age
Commit message (
Expand
)
Author
2006-11-01
Adjustments for the AlphaTLB changing to AlphaISA::TLB and changing register ...
Gabe Black
2006-08-11
Pushed most of constants.hh back into isa_traits.hh and regfile.hh and create...
Gabe Black
2006-07-22
Fixed subtract with carry, and started some work with floating point.
Gabe Black
2006-06-12
Merge m5.eecs.umich.edu:/bk/newmem
Gabe Black
2006-06-12
Made isHyperPriv and isPriv protected member variables.
Gabe Black
2006-06-11
Fix compiling for SPARC_SE:
Ali Saidi
2006-06-10
Update scripts for testing ALPHA_FS and MIPS_SE.
Steve Reinhardt
2006-06-06
Change ExecContext to ThreadContext. This is being renamed to differentiate ...
Kevin Lim
2006-05-31
Updated Authors from bk prs info
Ali Saidi
2006-05-29
Create a new CpuEvent class that has a pointer to an execution context in the...
Ali Saidi
2006-05-29
split off fullsystem and se iprs into two functions to remove lots of #ifs
Ali Saidi
2006-05-28
Moved the Bit64 constant out of the regfile.hh into isa_traits.cc, which is t...
Gabe Black
2006-05-26
Implement PR/HPR/ASR for full system
Ali Saidi
2006-05-22
have multiple global levels (as required by UA2005)
Ali Saidi
2006-05-22
New directory structure:
Steve Reinhardt