gem5 - gem5

Age	Commit message (Expand)	Author
2007-03-07	MiscReg->MiscRegNoEffect, MiscRegWithEffect->MiscReg	Ali Saidi
2007-03-03	Implement Niagara I/O interface and rework interrupts	Ali Saidi
2006-12-16	Merge zizzer:/bk/newmem	Gabe Black
2006-12-06	Some changes for misc regs which were changed into unofficial integer registe...	Gabe Black
2006-11-23	first cut at a sparc tlb	Ali Saidi
2006-11-01	Adjustments for the AlphaTLB changing to AlphaISA::TLB and changing register ...	Gabe Black
2006-08-11	Pushed most of constants.hh back into isa_traits.hh and regfile.hh and create...	Gabe Black
2006-07-22	Fixed subtract with carry, and started some work with floating point.	Gabe Black
2006-06-12	Merge m5.eecs.umich.edu:/bk/newmem	Gabe Black
2006-06-12	Made isHyperPriv and isPriv protected member variables.	Gabe Black
2006-06-11	Fix compiling for SPARC_SE:	Ali Saidi
2006-06-10	Update scripts for testing ALPHA_FS and MIPS_SE.	Steve Reinhardt
2006-06-06	Change ExecContext to ThreadContext. This is being renamed to differentiate ...	Kevin Lim
2006-05-31	Updated Authors from bk prs info	Ali Saidi
2006-05-29	Create a new CpuEvent class that has a pointer to an execution context in the...	Ali Saidi
2006-05-29	split off fullsystem and se iprs into two functions to remove lots of #ifs	Ali Saidi
2006-05-28	Moved the Bit64 constant out of the regfile.hh into isa_traits.cc, which is t...	Gabe Black
2006-05-26	Implement PR/HPR/ASR for full system	Ali Saidi
2006-05-22	have multiple global levels (as required by UA2005)	Ali Saidi
2006-05-22	New directory structure:	Steve Reinhardt