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path: root/src/arch/sparc/tlb.cc
AgeCommit message (Expand)Author
2007-09-28Rename cycles() function to ticks()Ali Saidi
2007-08-30params: Deprecate old-style constructors; update most SimObject constructors.Miles Kaufmann
2007-08-26Address Translation: Make SE mode use an actual TLB/MMU for translation like FS.Gabe Black
2007-08-26SPARC: Make sure unaligned access are caught on cached translations as well.Gabe Black
2007-08-13SPARC: Move tlb state into the tlb.Gabe Black
2007-08-13SPARC: Make the spill and fill handlers use the correct ASI, and let No_Fault...Gabe Black
2007-07-26Merge python and x86 changes with cache branchNathan Binkert
2007-07-23Major changes to how SimObjects are created and initialized. Almost allNathan Binkert
2007-06-30Get rid of Packet result field. Error responses areSteve Reinhardt
2007-03-08Panic if any CMT registers are accessedAli Saidi
2007-03-07*MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscRegAli Saidi
2007-03-03Implement Niagara I/O interface and rework interruptsAli Saidi
2007-02-21Merge zizzer:/bk/newmemAli Saidi
2007-02-21add pseduo instruction support for sparcAli Saidi
2007-02-21Fix compile issues on gcc 4.1.x related to namespaces.Nathan Binkert
2007-02-18implement vtophys and 32bit gdb supportAli Saidi
2007-02-02more sparc fixesAli Saidi
2007-01-31make sparc fs less chattyAli Saidi
2007-01-30Make SPARC checkpointing workAli Saidi
2007-01-27Merge zizzer:/bk/newmemGabe Black
2007-01-27Got rid of some DPRINTFs that were printing raw pointers.Gabe Black
2007-01-26Merge zeep.pool:/z/saidi/work/m5.newmemAli Saidi
2007-01-26make our code a little more standards compliantAli Saidi
2007-01-25fix smul and sdiv to sign extend, and handle overflow/underflow corretlyAli Saidi
2007-01-23use pstate.am to mask off PC/NPC where it needs to +beAli Saidi
2007-01-22clean up fault code a little bitAli Saidi
2007-01-22use writeTagAccess() function to unify writing of Tag access registersAli Saidi
2007-01-21make sure that page bits of VA on tlb insert are 0Ali Saidi
2007-01-20atually set all 64 bits of the retun value to 0Ali Saidi
2007-01-20Rearange tlb code to remove some duplicateAli Saidi
2007-01-17Allow ASI_LDTX_REALAli Saidi
2007-01-17do a linear search for matching tlb entries instead of using map because you ...Ali Saidi
2007-01-17Implement reading writing of sync fault status register and address registerAli Saidi
2007-01-16In the case of ASI_P or ASI_LDTX_P set primary and skip the other checksAli Saidi
2007-01-09quiet/remove some warningsAli Saidi
2006-12-27Bug fixes in the TLBAli Saidi
2006-12-19fix twinx loads a little bitAli Saidi
2006-12-18move the twinx loads to the correct opcode and add asis 0x24 and 0x27Ali Saidi
2006-12-15Optimized the TLB translations with some cachingAli Saidi
2006-12-14flesh out twinx asisAli Saidi
2006-12-12Fix bugs in tlbmap (and thus rangemap since the code is nearly identical)Ali Saidi
2006-12-09Allocate the correct number of global registersAli Saidi
2006-12-07get legion/m5 to first tlb miss faultAli Saidi
2006-12-06Handle access to ASI_QUEUEAli Saidi
2006-12-06Many more fixes for SPARC_FS. Gets us to the point where SOFTINT startsAli Saidi
2006-11-29Add TLB DprintfsAli Saidi
2006-11-29Add support for mmapped iprs to atomic cpuAli Saidi
2006-11-23first cut at a sparc tlbAli Saidi
2006-11-08Stubs for SPARC's tlbsGabe Black
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