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path: root/src/arch/sparc/tlb.cc
AgeCommit message (Expand)Author
2010-08-13CPU: Tidy up endianness handling for mmapped "IPR"s.Gabe Black
2009-08-01Clean up some inconsistencies with Request flags.Steve Reinhardt
2009-07-09SPARC: Fold the MiscRegFile all the way into the ISA object.Gabe Black
2009-04-08tlb: More fixing of unified TLBNathan Binkert
2009-04-08tlb: Don't separate the TLB classes into an instruction TLB and a data TLBGabe Black
2009-02-25CPU: Implement translateTiming which defers to translateAtomic, and convert t...Gabe Black
2009-02-25ISA: Replace the translate functions in the TLBs with translateAtomic.Gabe Black
2009-01-30Errors: Use the correct panic/warn/fatal/info message in some places.Ali Saidi
2008-11-10mem: update stuff for changes to Packet and RequestNathan Binkert
2008-10-21style: Use the correct m5 style for things relating to interrupts.Nathan Binkert
2008-10-12CPU: Eliminate the get_vec function.Gabe Black
2008-09-27gcc: Add extra parens to quell warnings.Nathan Binkert
2008-09-23sparc: Fix style, create a helper function for translation.Nathan Binkert
2008-02-26TLB: Make a TLB base class and put a virtual demapPage function in it.Gabe Black
2008-01-01SPARC: Fix a bug where the TLB would match against the wrong entries.Gabe Black
2007-11-30SPARC: Fixes for invalidateAll and demapAll in the SPARC TLBs.Gabe Black
2007-11-19Serialization: Serialize SPARC PTEs last so their nameOut() calls don't inter...Ali Saidi
2007-09-28Rename cycles() function to ticks()Ali Saidi
2007-08-30params: Deprecate old-style constructors; update most SimObject constructors.Miles Kaufmann
2007-08-26Address Translation: Make SE mode use an actual TLB/MMU for translation like FS.Gabe Black
2007-08-26SPARC: Make sure unaligned access are caught on cached translations as well.Gabe Black
2007-08-13SPARC: Move tlb state into the tlb.Gabe Black
2007-08-13SPARC: Make the spill and fill handlers use the correct ASI, and let No_Fault...Gabe Black
2007-07-26Merge python and x86 changes with cache branchNathan Binkert
2007-07-23Major changes to how SimObjects are created and initialized. Almost allNathan Binkert
2007-06-30Get rid of Packet result field. Error responses areSteve Reinhardt
2007-03-08Panic if any CMT registers are accessedAli Saidi
2007-03-07*MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscRegAli Saidi
2007-03-03Implement Niagara I/O interface and rework interruptsAli Saidi
2007-02-21Merge zizzer:/bk/newmemAli Saidi
2007-02-21add pseduo instruction support for sparcAli Saidi
2007-02-21Fix compile issues on gcc 4.1.x related to namespaces.Nathan Binkert
2007-02-18implement vtophys and 32bit gdb supportAli Saidi
2007-02-02more sparc fixesAli Saidi
2007-01-31make sparc fs less chattyAli Saidi
2007-01-30Make SPARC checkpointing workAli Saidi
2007-01-27Merge zizzer:/bk/newmemGabe Black
2007-01-27Got rid of some DPRINTFs that were printing raw pointers.Gabe Black
2007-01-26Merge zeep.pool:/z/saidi/work/m5.newmemAli Saidi
2007-01-26make our code a little more standards compliantAli Saidi
2007-01-25fix smul and sdiv to sign extend, and handle overflow/underflow corretlyAli Saidi
2007-01-23use pstate.am to mask off PC/NPC where it needs to +beAli Saidi
2007-01-22clean up fault code a little bitAli Saidi
2007-01-22use writeTagAccess() function to unify writing of Tag access registersAli Saidi
2007-01-21make sure that page bits of VA on tlb insert are 0Ali Saidi
2007-01-20atually set all 64 bits of the retun value to 0Ali Saidi
2007-01-20Rearange tlb code to remove some duplicateAli Saidi
2007-01-17Allow ASI_LDTX_REALAli Saidi
2007-01-17do a linear search for matching tlb entries instead of using map because you ...Ali Saidi
2007-01-17Implement reading writing of sync fault status register and address registerAli Saidi
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