| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2012-04-14 | clang/gcc: Fix compilation issues with clang 3.0 and gcc 4.6 | Andreas Hansson | |
| This patch addresses a number of minor issues that cause problems when compiling with clang >= 3.0 and gcc >= 4.6. Most importantly, it avoids using the deprecated ext/hash_map and instead uses unordered_map (and similarly so for the hash_set). To make use of the new STL containers, g++ and clang has to be invoked with "-std=c++0x", and this is now added for all gcc versions >= 4.6, and for clang >= 3.0. For gcc >= 4.3 and <= 4.5 and clang <= 3.0 we use the tr1 unordered_map to avoid the deprecation warning. The addition of c++0x in turn causes a few problems, as the compiler is more stringent and adds a number of new warnings. Below, the most important issues are enumerated: 1) the use of namespaces is more strict, e.g. for isnan, and all headers opening the entire namespace std are now fixed. 2) another other issue caused by the more stringent compiler is the narrowing of the embedded python, which used to be a char array, and is now unsigned char since there were values larger than 128. 3) a particularly odd issue that arose with the new c++0x behaviour is found in range.hh, where the operator< causes gcc to complain about the template type parsing (the "<" is interpreted as the beginning of a template argument), and the problem seems to be related to the begin/end members introduced for the range-type iteration, which is a new feature in c++11. As a minor update, this patch also fixes the build flags for the clang debug target that used to be shared with gcc and incorrectly use "-ggdb". | |||
| 2011-04-15 | includes: sort all includes | Nathan Binkert | |
| 2010-11-11 | SPARC: Clean up some historical style issues. | Gabe Black | |
| 2008-09-26 | When nesting if statements, use braces to avoid ambiguous else clauses. | Nathan Binkert | |
| 2007-01-25 | fix smul and sdiv to sign extend, and handle overflow/underflow corretly | Ali Saidi | |
| Only allow writing/reading of 32 bits of Y Only allow writing/reading 32 bits of pc when pstate.am Put any loaded data on the first half of a micro-op in uReg0 so it can't overwrite the register we are using for address calculation only erase a entry from the lookup table if it's valid Put in a temporary check to make sure that lookup table and tlb array stay in sync if we are interrupted in the middle of a mico-op, reset the micropc/nexpc so we start on the first part of it when we come back src/arch/sparc/isa/decoder.isa: fix smul and sdiv to sign extend, and handle overflow/underflow corretly Only allow writing/reading of 32 bits of Y Only allow writing/reading 32 bits of pc when pstate.am Put any loaded data on the first half of a micro-op in uReg0 so it can't overwrite the register we are using for address calculation src/arch/sparc/isa/formats/mem/blockmem.isa: Put any loaded data on the first half of a micro-op in uReg0 so it can't overwrite the register we are using for address calculation src/arch/sparc/isa/includes.isa: Use limits for 32bit underflow/overflow detection src/arch/sparc/tlb.cc: only erase a entry from the lookup table if it's valid Put in a temporary check to make sure that lookup table and tlb array stay in sync src/arch/sparc/tlb_map.hh: add a print function to dump the tlb lookup table src/cpu/simple/base.cc: if we are interrupted in the middle of a mico-op, reset the micropc/nexpc so we start on the first part of it when we come back --HG-- extra : convert_revision : 50a23837fd888393a5c2aa35cbd1abeebb7f55d4 | |||
| 2006-12-12 | Fix bugs in tlbmap (and thus rangemap since the code is nearly identical) | Ali Saidi | |
| Deal with block initializing stores (by doing nothing, at some point we might want to do the write hint 64 like thing) Fix tcc instruction igoner in legion-lock stuff to be correct in all cases Have console interrupts warn rather than panicing until we figure out what to do with interrupts src/arch/sparc/miscregfile.cc: src/arch/sparc/miscregfile.hh: add a magic miscreg which reads all the bits the tlb needs in one go src/arch/sparc/tlb.cc: initialized the context type and id to reasonable values and handle block init stores src/arch/sparc/tlb_map.hh: fix bug in tlb map code src/base/range_map.hh: fix bug in rangemap code and add range_multimap (these are probably useful for bus range stuff) src/cpu/exetrace.cc: fixup tcc ignore code to be correct src/dev/sparc/t1000.cc: make console interrupt stuff warn instead of panicing until we get interrupt stuff figured out src/unittest/rangemaptest.cc: fix up the rangemap unit test to catch the missing case --HG-- extra : convert_revision : 70604a8b5d0553aa0b0bd7649f775a0cfa8267a5 | |||
| 2006-11-23 | first cut at a sparc tlb | Ali Saidi | |
| src/arch/sparc/SConscript: Add code to serialize/unserialze tlb entries src/arch/sparc/asi.cc: src/arch/sparc/asi.hh: update asi names for how they're listed in the supplement add asis add more asi functions src/arch/sparc/isa_traits.hh: move the interrupt stuff and some basic address space stuff into isa traits src/arch/sparc/miscregfile.cc: src/arch/sparc/miscregfile.hh: add mmu registers to tlb get rid of implicit asi stuff... the tlb will handle it src/arch/sparc/regfile.hh: make isnt/dataAsid return ints not asis src/arch/sparc/tlb.cc: src/arch/sparc/tlb.hh: first cut at sparc tlb src/arch/sparc/vtophys.hh: pagatable nedes to be included here src/mem/request.hh: add asi and if the request is a memory mapped register to the requset object src/sim/host.hh: fix incorrect definition of LL --HG-- extra : convert_revision : 6c85cd1681c62c8cd8eab04f70b1f15a034b0aa3 | |||
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