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path: root/src/arch/sparc/ua2005.cc
AgeCommit message (Expand)Author
2015-09-30isa,cpu: Add support for FS SMT InterruptsMitch Hayenga
2015-09-15sparc: writing to tick_cmpr should not cause a panicPalle Lyckegaard
2012-08-28Clock: Add a Cycles wrapper class and use where applicableAndreas Hansson
2012-02-11SPARC: Make PSTATE and HPSTATE a BitUnion.Gabe Black
2011-10-31SE/FS: Remove the last uses of FULL_SYSTEM from SPARC.Gabe Black
2011-10-09[mq]: sefssparcregfile.patchGabe Black
2011-04-15trace: reimplement the DTRACE function so it doesn't use a vectorNathan Binkert
2011-01-07Replace curTick global variable with accessor functions.Steve Reinhardt
2010-11-11SPARC: Clean up some historical style issues.Gabe Black
2009-07-09SPARC: Fold the MiscRegFile all the way into the ISA object.Gabe Black
2009-04-15Get rid of the Unallocated thread context state.Steve Reinhardt
2009-02-25ISA: Get rid of the get*RegName functions.Gabe Black
2008-11-05Fix a few more places where the context stuff wasn't changedNathan Binkert
2008-11-02Add in Context IDs to the simulator. From now on, cpuId is almost never used,Lisa Hsu
2008-11-02make BaseCPU the provider of _cpuId, and cpuId() instead of being scatteredLisa Hsu
2008-10-21style: Use the correct m5 style for things relating to interrupts.Nathan Binkert
2008-10-09eventq: convert all usage of events to use the new API.Nathan Binkert
2008-08-11styleNathan Binkert
2007-09-28Rename cycles() function to ticks()Ali Saidi
2007-03-13fix interrupting during a quisce on sparcAli Saidi
2007-03-12move hver code to ua2005.ccAli Saidi
2007-03-09implement ipi stufff for SPARCAli Saidi
2007-03-07I missed a couple of WithEffects, this should do itAli Saidi
2007-03-07*MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscRegAli Saidi
2007-03-03Implement Niagara I/O interface and rework interruptsAli Saidi
2007-01-26Merge zizzer:/bk/newmemLisa Hsu
2007-01-26eliminate cpu checkInterrupts bool, it is redundant and unnecessary.Lisa Hsu
2007-01-22clean up fault code a little bitAli Saidi
2007-01-19some hstick and hintp changes.Lisa Hsu
2007-01-11Merge zed.eecs.umich.edu:/z/hsul/work/sparc/ali.m5Lisa Hsu
2007-01-11ua2005.cc:Lisa Hsu
2007-01-11ua2005.cc:Lisa Hsu
2007-01-09quiet/remove some warningsAli Saidi
2007-01-08the way i understand it, interrupts in m5 is a little bloated. the usage of ...Lisa Hsu
2007-01-08fix softint and partially implement hstick interrupts need to figure out how ...Ali Saidi
2007-01-05set the softint appropriately on an timer compare interruptAli Saidi
2007-01-04Fix stick compare to work correctly and set checkInterrupts to true at the ap...Ali Saidi
2006-12-09fix lisa's hand mergeAli Saidi
2006-12-08Merge zizzer:/bk/sparcfsLisa Hsu
2006-12-08mostly implemented SOFTINT relevant interrupt stuff.Lisa Hsu
2006-12-07get legion/m5 to first tlb miss faultAli Saidi
2006-12-04reogranize code to split off FS only misc regs with effect into their own fil...Ali Saidi
2006-08-14Fix up doxygen.Steve Reinhardt
2006-06-06Change ExecContext to ThreadContext. This is being renamed to differentiate ...Kevin Lim
2006-05-31Updated Authors from bk prs infoAli Saidi
2006-05-29Create a new CpuEvent class that has a pointer to an execution context in the...Ali Saidi
2006-05-29split off fullsystem and se iprs into two functions to remove lots of #ifsAli Saidi
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