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path: root/src/arch/sparc
AgeCommit message (Expand)Author
2006-12-08Merge zizzer:/bk/sparcfsLisa Hsu
2006-12-08mostly implemented SOFTINT relevant interrupt stuff.Lisa Hsu
2006-12-07get legion/m5 to first tlb miss faultAli Saidi
2006-12-06Handle access to ASI_QUEUEAli Saidi
2006-12-06Many more fixes for SPARC_FS. Gets us to the point where SOFTINT startsAli Saidi
2006-12-04forgot to commit miscreg fileAli Saidi
2006-12-04Merge zizzer:/bk/sparcfsGabe Black
2006-12-04Add in code to pass the ASI to translation.Gabe Black
2006-12-04reogranize code to split off FS only misc regs with effect into their own fil...Ali Saidi
2006-12-04More changes to get SPARC fs closer. Now at 1.2M cycles before differenceAli Saidi
2006-11-30Load the hypervisor symbols twice, once with an address mask so that we can g...Ali Saidi
2006-11-29Add TLB DprintfsAli Saidi
2006-11-29Fixes to get compilation.Gabe Black
2006-11-29Merge zizzer:/bk/sparcfsGabe Black
2006-11-29Add support for mmapped iprs to atomic cpuAli Saidi
2006-11-24Initial changes to get O3 working with SPARCGabe Black
2006-11-24Rename this function.Gabe Black
2006-11-24Fix weird type modifier.Gabe Black
2006-11-24Fix an include problem.Gabe Black
2006-11-23Merge zizzer:/bk/sparcfsAli Saidi
2006-11-23first cut at a sparc tlbAli Saidi
2006-11-23Fixes to the isa description.Gabe Black
2006-11-22Moved some constants from isa_traits.hh to the reg file headers.Gabe Black
2006-11-22Merge zizzer:/bk/sparcfsGabe Black
2006-11-20Make sure only real bits of pstate can be set.Gabe Black
2006-11-20Set the pstate.priv bit to 1 in hyperpriveleged mode. The description in the ...Gabe Black
2006-11-20Add in rom/rams for the nvram, hypervisor description, and partition descript...Gabe Black
2006-11-16Implement current working directory for LiveProcessesNathan Binkert
2006-11-16Merge zower.eecs.umich.edu:/home/gblack/m5/newmemmemopsGabe Black
2006-11-16Fixes for SPARC_FSGabe Black
2006-11-14Merge zizzer.eecs.umich.edu:/bk/newmem/Gabe Black
2006-11-14interrupts.hh:Lisa Hsu
2006-11-14Set hpstate to be what I'm assuming Legion is.Gabe Black
2006-11-14Make sure a POR doesn't clobber the value of the hpstate.Gabe Black
2006-11-14Fix up the disassembly a little.Gabe Black
2006-11-11Fix for CAS so that it knows about all the possible code in the constructor.Gabe Black
2006-11-10fix endian issues with condition codesAli Saidi
2006-11-10Elaborated on the tlb stubs so that they just set the physical address to the...Gabe Black
2006-11-10Fixed up DepTags a little. I think NumMicroIntRegs shouldn't be added to Ctrl...Gabe Black
2006-11-10Added StrandStsReg operand.Gabe Black
2006-11-10Put in provisions for rd, rdpr, rdhpr, wr, wrpr, and wrhpr to disassemble pro...Gabe Black
2006-11-10Made the annul of unconditional conditional branches behave properly, added c...Gabe Black
2006-11-10Fixed up the code that prints out registers to take into account microregisters.Gabe Black
2006-11-10Tweaked debug output.Gabe Black
2006-11-10Touched up faults, and made POR actually do something.Gabe Black
2006-11-10The reset function of the MiscRegFile really resets it now. This function is ...Gabe Black
2006-11-10Set the ASI register to be something explicitly so that simulation is determi...Gabe Black
2006-11-10Fix up instructions to read and write control registers, and got rid of the c...Gabe Black
2006-11-09Moved the Alpha MiscRegFile into it's own file, and got rid of the Alpha spec...Gabe Black
2006-11-09Fix a couple uninitialized variables.Gabe Black