| Age | Commit message (Expand) | Author |
|---|
| 2015-09-15 | sparc: writing to tick_cmpr should not cause a panic | Palle Lyckegaard |
| 2015-07-28 | revert 5af8f40d8f2c | Nilay Vaish |
| 2015-07-26 | cpu: implements vector registers | Nilay Vaish |
| 2015-07-07 | sim: Refactor the serialization base class | Andreas Sandberg |
| 2015-05-05 | mem, cpu: Add a separate flag for strictly ordered memory | Andreas Sandberg |
| 2015-02-16 | arch: Make readMiscRegNoEffect const throughout | Andreas Hansson |
| 2015-02-11 | sim: Move the BaseTLB to src/arch/generic/ | Andreas Sandberg |
| 2015-01-25 | cpu: Put all CPU instruction tracers in a single file | Ali Saidi |
| 2014-12-05 | misc: Generalize GDB single stepping. | Gabe Black |
| 2014-12-05 | misc: Make the GDB register cache accessible in various sized chunks. | Gabe Black |
| 2014-11-23 | mem: Page Table map api modification | Alexandru Dutu |
| 2014-11-23 | kvm, x86: Adding support for SE mode execution | Alexandru Dutu |
| 2014-10-22 | sim: revert 6709bbcf564d | Nilay Vaish |
| 2014-10-20 | sim: implement getdents/getdents64 in user mode | Michael Adler |
| 2014-10-16 | arch: Use shared_ptr for all Faults | Andreas Hansson |
| 2014-09-27 | arch: Use const StaticInstPtr references where possible | Andreas Hansson |
| 2014-09-20 | alpha,arm,mips,power,x86,cpu,sim: Cleanup activate/deactivate | Mitch Hayenga |
| 2014-09-03 | arch: Cleanup unused ISA traits constants | Andreas Hansson |
| 2014-08-28 | mem: adding architectural page table support for SE mode | Alexandru |
| 2014-08-26 | sparc: Fixup bit ordering in the PSTATE bit union | Andreas Sandberg |
| 2014-05-31 | style: eliminate equality tests with true and false | Steve Reinhardt |
| 2014-05-12 | syscall emulation: clean up & comment SyscallReturn | Steve Reinhardt |
| 2014-05-09 | arch: teach ISA parser how to split code across files | Curtis Dunham |
| 2014-05-09 | arch, arm: Preserve TLB bootUncacheability when switching CPUs | Geoffrey Blake |
| 2014-05-09 | arch: remove inline specifiers on all inst constrs, all ISAs | Curtis Dunham |
| 2014-01-24 | arch: Make all register index flattening const | Andreas Hansson |
| 2014-01-24 | arch, cpu: Add support for flattening misc register indexes. | Ali Saidi |
| 2014-01-24 | cpu: Add CPU support for generatig wake up events when LLSC adresses are snoo... | Ali Saidi |
| 2013-10-15 | cpu: add a condition-code register class | Yasuko Eckert |
| 2013-10-15 | cpu: rename *_DepTag constants to *_Reg_Base | Steve Reinhardt |
| 2013-10-15 | isa: clean up register constants | Steve Reinhardt |
| 2013-10-15 | mem: Rename the ASI_BITS flag field in Request | Andreas Sandberg |
| 2013-09-30 | arch: Add support for m5ops using mmapped IPRs | Andreas Sandberg |
| 2013-06-03 | arch: Create a method to finalize physical addresses | Andreas Sandberg |
| 2013-02-19 | scons: Add warning for missing declarations | Andreas Hansson |
| 2013-02-19 | scons: Add warning for overloaded virtual functions | Andreas Hansson |
| 2013-02-19 | scons: Add warning for overloaded virtual functions | Andreas Hansson |
| 2013-02-19 | scons: Add warning for missing field initializers | Andreas Hansson |
| 2013-01-22 | x86, cpu: corrects 270c9a75e91f, take over decoder on cpu switch | Nilay Vaish |
| 2013-01-12 | x86: Changes to decoder, corrects 9376 | Nilay Vaish |
| 2013-01-07 | cpu: Flush TLBs on switchOut() | Andreas Sandberg |
| 2013-01-07 | arch: Move the ISA object to a separate section | Andreas Sandberg |
| 2013-01-07 | arch: Add support for invalidating TLBs when draining | Andreas Sandberg |
| 2013-01-07 | arch: Make the ISA class inherit from SimObject | Andreas Sandberg |
| 2013-01-07 | o3: Fix issue with LLSC ordering and speculation | Ali Saidi |
| 2013-01-04 | Decoder: Remove the thread context get/set from the decoder. | Gabe Black |
| 2013-01-04 | SPARC: Keep a copy of the current ASI in the decoder. | Gabe Black |
| 2012-11-02 | sim: Include object header files in SWIG interfaces | Andreas Sandberg |
| 2012-11-02 | ISA: generic Linux thread info support | Dam Sunwoo |
| 2012-10-15 | Checkpoint: Make system serialize call children | Andreas Hansson |
