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path: root/src/arch/sparc
AgeCommit message (Expand)Author
2007-01-22clean up fault code a little bitAli Saidi
2007-01-22Merge zizzer:/bk/newmemAli Saidi
2007-01-22use writeTagAccess() function to unify writing of Tag access registersAli Saidi
2007-01-21make sure that page bits of VA on tlb insert are 0Ali Saidi
2007-01-20fix InterruptLevel code to return the correct levelAli Saidi
2007-01-20atually set all 64 bits of the retun value to 0Ali Saidi
2007-01-20fix flushw implementationAli Saidi
2007-01-20Rearange tlb code to remove some duplicateAli Saidi
2007-01-20Spill and Fill handlers are actually n*4 + the start addressAli Saidi
2007-01-19Merge zed.eecs.umich.edu:/.automount/zeep/z/saidi/work/m5.newmemLisa Hsu
2007-01-19some hstick and hintp changes.Lisa Hsu
2007-01-17Allow ASI_LDTX_REALAli Saidi
2007-01-17do a linear search for matching tlb entries instead of using map because you ...Ali Saidi
2007-01-17Implement reading writing of sync fault status register and address registerAli Saidi
2007-01-16In the case of ASI_P or ASI_LDTX_P set primary and skip the other checksAli Saidi
2007-01-16Modify ISA and staticInst to support a IsFirstMicroOp flagAli Saidi
2007-01-11Merge zed.eecs.umich.edu:/z/hsul/work/sparc/ali.m5Lisa Hsu
2007-01-11ua2005.cc:Lisa Hsu
2007-01-11ua2005.cc:Lisa Hsu
2007-01-11Add Trap Level Zero to interrupts, remove some unreachable code that I forgot...Lisa Hsu
2007-01-10bug fixes to get us to 145m instructionsAli Saidi
2007-01-09quiet/remove some warningsAli Saidi
2007-01-08the way i understand it, interrupts in m5 is a little bloated. the usage of ...Lisa Hsu
2007-01-08some formatting changes, and update how I do bitfields for HPSTATE and PSTATE...Lisa Hsu
2007-01-08fix softint and partially implement hstick interrupts need to figure out how ...Ali Saidi
2007-01-05set the softint appropriately on an timer compare interruptAli Saidi
2007-01-04Fix stick compare to work correctly and set checkInterrupts to true at the ap...Ali Saidi
2006-12-27Bug fixes in the TLBAli Saidi
2006-12-19fix twinx loads a little bitAli Saidi
2006-12-18move the twinx loads to the correct opcode and add asis 0x24 and 0x27Ali Saidi
2006-12-17Compilation fixes.Gabe Black
2006-12-17Added in the extended twin load formatGabe Black
2006-12-16Merge zizzer:/bk/sparcfs/Gabe Black
2006-12-16Support for twin loads.Gabe Black
2006-12-16Compiler error fix.Gabe Black
2006-12-15some small general fixes to make everythign work nicely with other ISAs, now ...Lisa Hsu
2006-12-15Optimized the TLB translations with some cachingAli Saidi
2006-12-14flesh out twinx asisAli Saidi
2006-12-12Fix bugs in tlbmap (and thus rangemap since the code is nearly identical)Ali Saidi
2006-12-09fix lisa's hand mergeAli Saidi
2006-12-09Merge zizzer:/bk/sparcfsAli Saidi
2006-12-09Allocate the correct number of global registersAli Saidi
2006-12-08Merge zizzer:/bk/sparcfsLisa Hsu
2006-12-08mostly implemented SOFTINT relevant interrupt stuff.Lisa Hsu
2006-12-07get legion/m5 to first tlb miss faultAli Saidi
2006-12-06Handle access to ASI_QUEUEAli Saidi
2006-12-06Many more fixes for SPARC_FS. Gets us to the point where SOFTINT startsAli Saidi
2006-12-04forgot to commit miscreg fileAli Saidi
2006-12-04Merge zizzer:/bk/sparcfsGabe Black
2006-12-04Add in code to pass the ASI to translation.Gabe Black
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