| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2009-07-19 | CPU: Separate out native trace into ISA (in)dependent code and SimObjects. | Gabe Black | |
| --HG-- rename : src/cpu/nativetrace.cc => src/arch/sparc/nativetrace.cc rename : src/cpu/nativetrace.hh => src/arch/sparc/nativetrace.hh rename : src/cpu/NativeTrace.py => src/arch/x86/X86NativeTrace.py | |||
| 2009-07-10 | SPARC: Set up a lookup table for integer register flattening. | Gabe Black | |
| Using a look up table changed the run time of the SPARC_FS solaris boot regression from: real 14m45.951s user 13m57.528s sys 0m3.452s to: real 12m19.777s user 12m2.685s sys 0m2.420s | |||
| 2009-07-09 | SPARC: Fold the MiscRegFile all the way into the ISA object. | Gabe Black | |
| 2009-07-08 | Get rid of the unused get(Data|Inst)Asid and (inst|data)Asid functions. | Gabe Black | |
| 2009-07-08 | Registers: Add a registers.hh file as an ISA switched header. | Gabe Black | |
| This file is for register indices, Num* constants, and register types. copyRegs and copyMiscRegs were moved to utility.hh and utility.cc. --HG-- rename : src/arch/alpha/regfile.hh => src/arch/alpha/registers.hh rename : src/arch/arm/regfile.hh => src/arch/arm/registers.hh rename : src/arch/mips/regfile.hh => src/arch/mips/registers.hh rename : src/arch/sparc/regfile.hh => src/arch/sparc/registers.hh rename : src/arch/x86/regfile.hh => src/arch/x86/registers.hh | |||
| 2009-07-08 | Registers: Eliminate the ISA defined RegFile class. | Gabe Black | |
| 2009-07-08 | Registers: Move the PCs out of the ISAs and into the CPUs. | Gabe Black | |
| 2009-07-08 | SPARC: Phase out SPARC's intregfile.hh. | Gabe Black | |
| 2009-07-08 | Registers: Eliminate the ISA defined integer register file. | Gabe Black | |
| 2009-07-08 | Registers: Eliminate the ISA defined floating point register file. | Gabe Black | |
| 2009-07-08 | Registers: Get rid of the float register width parameter. | Gabe Black | |
| 2009-07-08 | Registers: Add an ISA object which replaces the MiscRegFile. | Gabe Black | |
| This object encapsulates (or will eventually) the identity and characteristics of the ISA in the CPU. | |||
| 2009-07-05 | SPARC: Fix the parenthesis in inUserMode. | Gabe Black | |
| 2009-05-17 | includes: sort includes again | Nathan Binkert | |
| 2009-05-17 | includes: use base/types.hh not inttypes.h or stdint.h | Nathan Binkert | |
| 2009-05-17 | types: Move stuff for global types into src/base/types.hh | Nathan Binkert | |
| --HG-- rename : src/sim/host.hh => src/base/types.hh | |||
| 2009-04-24 | SPARC: Tighten up the clone system call and SPARCs copyRegs. | Gabe Black | |
| 2009-04-21 | syscall: Resolve conflicts between m5threads and Gabe's recent SE changes. | Steve Reinhardt | |
| 2009-04-21 | Commit m5threads package. | Daniel Sanchez | |
| This patch adds limited multithreading support in syscall-emulation mode, by using the clone system call. The clone system call works for Alpha, SPARC and x86, and multithreaded applications run correctly in Alpha and SPARC. | |||
| 2009-04-19 | SE mode: Make keeping track of the number of syscalls less hacky. | Gabe Black | |
| 2009-04-15 | Get rid of the Unallocated thread context state. | Steve Reinhardt | |
| Basically merge it in with Halted. Also had to get rid of a few other functions that called ThreadContext::deallocate(), including: - InOrderCPU's setThreadRescheduleCondition. - ThreadContext::exit(). This function was there to avoid terminating simulation when one thread out of a multi-thread workload exits, but we need to find a better (non-cpu-centric) way. | |||
| 2009-04-08 | tlb: More fixing of unified TLB | Nathan Binkert | |
| 2009-04-08 | tlb: Don't separate the TLB classes into an instruction TLB and a data TLB | Gabe Black | |
| 2009-02-28 | Fix Num_Syscall_Descs check bug in non-x86 ISAs. | Steve Reinhardt | |
| (See cset d35d2b28df38 for x86 fix.) | |||
| 2009-02-27 | Processes: Make getting and setting system call arguments part of a process ↵ | Gabe Black | |
| object. | |||
| 2009-02-25 | ISA: Get rid of the get*RegName functions. | Gabe Black | |
| 2009-02-25 | SPARC: Get rid of the state keeping track of register frames. | Gabe Black | |
| 2009-02-25 | ISA: Set up common trace flags for tracing registers. | Gabe Black | |
| 2009-02-25 | ISA: Get rid of FlattenIntIndex function. | Gabe Black | |
| 2009-02-25 | SPARC: Get rid of flattenIndex in the int register file. | Gabe Black | |
| 2009-02-25 | ISA: Use the "Stack" traceflag for DPRINTFs about the initial stack frame. | Gabe Black | |
| 2009-02-25 | SPARC: Get rid of the setGlobals function. | Gabe Black | |
| 2009-02-25 | SPARC: Get rid of the setCWP function. | Gabe Black | |
| 2009-02-25 | SPARC: Add a traceflag for register windows. | Gabe Black | |
| 2009-02-25 | CPU: Implement translateTiming which defers to translateAtomic, and convert ↵ | Gabe Black | |
| the timing simple CPU to use it. | |||
| 2009-02-25 | SPARC: Adjust a few instructions to not write registers in initiateAcc. | Gabe Black | |
| 2009-02-25 | ISA: Replace the translate functions in the TLBs with translateAtomic. | Gabe Black | |
| 2009-02-16 | sycalls: implement mremap() and add DATA flag for getrlimit(). mremap has ↵ | Lisa Hsu | |
| been tested on Alpha, compiles for the rest but not tested. I don't see why it wouldn't work though. | |||
| 2009-01-30 | Errors: Use the correct panic/warn/fatal/info message in some places. | Ali Saidi | |
| 2009-01-25 | CPU: Add a setCPU function to the interrupt objects. | Gabe Black | |
| 2009-01-19 | tracing: Add help strings for some of the trace flags | Nathan Binkert | |
| 2009-01-13 | SCons: centralize the Dir() workaround for newer versions of scons. | Nathan Binkert | |
| Scons bug id: 2006 M5 Bug id: 308 | |||
| 2008-12-16 | SPARC: Truncate syscall args and return values appropriately. | Gabe Black | |
| 2008-12-07 | imported patch aux-fix.patch | Lisa Hsu | |
| 2008-12-04 | This patch pulls out the auxiliary vector struct from individual ISA | Lisa Hsu | |
| LiveProcesses to the base LiveProcess definition so anyone can use them. | |||
| 2008-11-15 | syscalls: fix latent brk/obreak bug. | Steve Reinhardt | |
| Bogus calls to ChunkGenerator with negative size were triggering a new assertion that was added there. Also did a little renaming and cleanup in the process. | |||
| 2008-11-10 | mem: update stuff for changes to Packet and Request | Nathan Binkert | |
| 2008-11-05 | Fix a few more places where the context stuff wasn't changed | Nathan Binkert | |
| 2008-11-02 | Add in Context IDs to the simulator. From now on, cpuId is almost never used, | Lisa Hsu | |
| the primary identifier for a hardware context should be contextId(). The concept of threads within a CPU remains, in the form of threadId() because sometimes you need to know which context within a cpu to manipulate. | |||
| 2008-11-02 | Make it so that all thread contexts are registered with the System, even in | Lisa Hsu | |
| SE. Process still keeps track of the tc's it owns, but registration occurs with the System, this eases the way for system-wide context Ids based on registration. | |||
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