summaryrefslogtreecommitdiff
path: root/src/arch/x86/bios/IntelMP.py
AgeCommit message (Collapse)Author
2009-02-01X86: Add extended Intel MP entries correctly.Gabe Black
2009-02-01X86: Set/correct some default values for x86 parameters.Gabe Black
2008-12-06X86: Add add_entry back in.Gabe Black
2008-10-20O3CPU: Undo Gabe's changes to remove hwrei and simpalcheck from O3 CPU. ↵Ali Saidi
Removing hwrei causes the instruction after the hwrei to be fetched before the ITB/DTB_CM register is updated in a call pal call sys and thus the translation fails because the user is attempting to access a super page address. Minimally, it seems as though some sort of fetch stall or refetch after a hwrei is required. I think this works currently because the hwrei uses the exec context interface, and the o3 stalls when that occurs. Additionally, these changes don't update the LOCK register and probably break ll/sc. Both o3 changes were removed since a great deal of manual patching would be required to only remove the hwrei change.
2008-10-11X86: Add an Intel MP table to the simulation.Gabe Black
2008-10-10X86: Create SimObjects in python and C++ to represent the Intel MP tables.Gabe Black