gem5 - gem5

Age	Commit message (Expand)	Author
2017-07-05	arch, cpu: Architectural Register structural indexing	Nathanael Premillieu
2016-02-06	style: fix missing spaces in control statements	Steve Reinhardt
2011-04-15	trace: reimplement the DTRACE function so it doesn't use a vector	Nathan Binkert
2010-10-31	ISA,CPU,etc: Create an ISA defined PC type that abstracts out ISA behaviors.	Gabe Black
2010-05-23	copyright: Change HP copyright on x86 code to be more friendly	Nathan Binkert
2009-07-17	X86: Set up a named constant for the "fold bit" for int register indices.	Gabe Black
2009-07-16	X86: Take limitted advantage of the compilers type checking for microop opera...	Gabe Black
2009-01-06	X86: Move the function that prints memory args into the inst base class.	Gabe Black
2007-09-06	X86: Make signed versions of partial register values available to microops.	Gabe Black
2007-07-30	X86: Make merge and pick work with high bytes. Fix a sizing issue in pick.	Gabe Black
2007-07-29	X86: Fix a bug with merge	Gabe Black
2007-07-17	Make disassembled x86 register indices reflect their size.	Gabe Black
2007-07-14	Pull some hard coded base classes out of the isa description.	Gabe Black