| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2013-01-04 | X86: Move address based decode caching in front of the predecoder. | Gabe Black | |
| The predecoder in x86 does a lot of work, most of which can be skipped if the decoder cache is put in front of it. Committed by: Nilay Vaish <nilay@cs.wisc.edu> | |||
| 2012-12-30 | x86: implement x87 fp instruction fnstsw | Nilay Vaish | |
| This patch implements the fnstsw instruction. The code was originally written by Vince Weaver. Gabe had made some comments about the code, but those were never addressed. This patch addresses those comments. | |||
| 2010-08-17 | x86: minor checkpointing bug fixes | Steve Reinhardt | |
| 2009-11-04 | build: fix compile problems pointed out by gcc 4.4 | Nathan Binkert | |
| 2009-07-17 | X86: Shift some register flattening work into the decoder. | Gabe Black | |
| 2009-07-09 | X86: Fold the MiscRegFile all the way into the ISA object. | Gabe Black | |
| 2009-07-08 | Registers: Add an ISA object which replaces the MiscRegFile. | Gabe Black | |
| This object encapsulates (or will eventually) the identity and characteristics of the ISA in the CPU. | |||
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index : gem5 | |
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