| Age | Commit message (Expand) | Author |
|---|
| 2018-05-08 | arch-x86, arch-power: fix calls to bits and insertBits | Matt Sinclair |
| 2017-12-22 | arch,cpu: "virtualize" the TLB interface. | Gabe Black |
| 2017-12-14 | misc: Updates for gcc7.2 for x86 | Jason Lowe-Power |
| 2017-12-06 | x86: Split apart x87's FSW and TOP, and add a missing break. | Gabe Black |
| 2016-11-09 | style: [patch 1/22] use /r/3648/ to reorganize includes | Brandon Potter |
| 2016-02-06 | x86: create function to check miscreg validity | Steve Reinhardt |
| 2015-07-07 | sim: Refactor the serialization base class | Andreas Sandberg |
| 2015-07-04 | x86: Adjust the size of the values written to the x87 misc registers | Nikos Nikoleris |
| 2015-02-16 | arch: Make readMiscRegNoEffect const throughout | Andreas Hansson |
| 2013-01-12 | x86: Changes to decoder, corrects 9376 | Nilay Vaish |
| 2013-01-07 | arch: Move the ISA object to a separate section | Andreas Sandberg |
| 2013-01-07 | arch: Add support for invalidating TLBs when draining | Andreas Sandberg |
| 2013-01-07 | arch: Make the ISA class inherit from SimObject | Andreas Sandberg |
| 2013-01-04 | X86: Move address based decode caching in front of the predecoder. | Gabe Black |
| 2012-12-30 | x86: implement x87 fp instruction fnstsw | Nilay Vaish |
| 2010-08-17 | x86: minor checkpointing bug fixes | Steve Reinhardt |
| 2009-11-04 | build: fix compile problems pointed out by gcc 4.4 | Nathan Binkert |
| 2009-07-17 | X86: Shift some register flattening work into the decoder. | Gabe Black |
| 2009-07-09 | X86: Fold the MiscRegFile all the way into the ISA object. | Gabe Black |
| 2009-07-08 | Registers: Add an ISA object which replaces the MiscRegFile. | Gabe Black |
