Age | Commit message (Expand) | Author |
2015-10-12 | misc: Remove redundant compiler-specific defines | Andreas Hansson |
2015-07-28 | revert 5af8f40d8f2c | Nilay Vaish |
2015-07-26 | cpu: implements vector registers | Nilay Vaish |
2015-07-07 | sim: Refactor the serialization base class | Andreas Sandberg |
2015-02-16 | arch: Make readMiscRegNoEffect const throughout | Andreas Hansson |
2014-01-24 | arch: Make all register index flattening const | Andreas Hansson |
2014-01-24 | arch, cpu: Add support for flattening misc register indexes. | Ali Saidi |
2013-10-15 | cpu: add a condition-code register class | Yasuko Eckert |
2013-02-19 | scons: Add warning for overloaded virtual functions | Andreas Hansson |
2013-01-12 | x86: Changes to decoder, corrects 9376 | Nilay Vaish |
2013-01-07 | arch: Move the ISA object to a separate section | Andreas Sandberg |
2013-01-07 | arch: Make the ISA class inherit from SimObject | Andreas Sandberg |
2013-01-04 | X86: Move address based decode caching in front of the predecoder. | Gabe Black |
2011-04-15 | includes: sort all includes | Nathan Binkert |
2010-08-23 | X86: Create a directory for files that define register indexes. | Gabe Black |
2009-07-17 | X86: Set up a named constant for the "fold bit" for int register indices. | Gabe Black |
2009-07-17 | X86: Shift some register flattening work into the decoder. | Gabe Black |
2009-07-09 | X86: Fold the MiscRegFile all the way into the ISA object. | Gabe Black |
2009-07-08 | Get rid of the unused get(Data|Inst)Asid and (inst|data)Asid functions. | Gabe Black |
2009-07-08 | Registers: Add an ISA object which replaces the MiscRegFile. | Gabe Black |