summaryrefslogtreecommitdiff
path: root/src/arch/x86/isa/decoder/one_byte_opcodes.isa
AgeCommit message (Collapse)Author
2015-07-20syscall_emul: [patch 13/22] add system call retry capabilityBrandon Potter
This changeset adds functionality that allows system calls to retry without affecting thread context state such as the program counter or register values for the associated thread context (when system calls return with a retry fault). This functionality is needed to solve problems with blocking system calls in multi-process or multi-threaded simulations where information is passed between processes/threads. Blocking system calls can cause deadlock because the simulator itself is single threaded. There is only a single thread servicing the event queue which can cause deadlock if the thread hits a blocking system call instruction. To illustrate the problem, consider two processes using the producer/consumer sharing model. The processes can use file descriptors and the read and write calls to pass information to one another. If the consumer calls the blocking read system call before the producer has produced anything, the call will block the event queue (while executing the system call instruction) and deadlock the simulation. The solution implemented in this changeset is to recognize that the system calls will block and then generate a special retry fault. The fault will be sent back up through the function call chain until it is exposed to the cpu model's pipeline where the fault becomes visible. The fault will trigger the cpu model to replay the instruction at a future tick where the call has a chance to succeed without actually going into a blocking state. In subsequent patches, we recognize that a syscall will block by calling a non-blocking poll (from inside the system call implementation) and checking for events. When events show up during the poll, it signifies that the call would not have blocked and the syscall is allowed to proceed (calling an underlying host system call if necessary). If no events are returned from the poll, we generate the fault and try the instruction for the thread context at a distant tick. Note that retrying every tick is not efficient. As an aside, the simulator has some multi-threading support for the event queue, but it is not used by default and needs work. Even if the event queue was completely multi-threaded, meaning that there is a hardware thread on the host servicing a single simulator thread contexts with a 1:1 mapping between them, it's still possible to run into deadlock due to the event queue barriers on quantum boundaries. The solution of replaying at a later tick is the simplest solution and solves the problem generally.
2014-12-04x86: Rework opcode parsing to support 3 byte opcodes properly.Gabe Black
Instead of counting the number of opcode bytes in an instruction and recording each byte before the actual opcode, we can represent the path we took to get to the actual opcode byte by using a type code. That has a couple of advantages. First, we can disambiguate the properties of opcodes of the same length which have different properties. Second, it reduces the amount of data stored in an ExtMachInst, making them slightly easier/faster to create and process. This also adds some flexibility as far as how different types of opcodes are handled, which might come in handy if we decide to support VEX or XOP instructions. This change also adds tables to support properly decoding 3 byte opcodes. Before we would fall off the end of some arrays, on top of the ambiguity described above. This change doesn't measureably affect performance on the twolf benchmark. --HG-- rename : src/arch/x86/isa/decoder/three_byte_opcodes.isa => src/arch/x86/isa/decoder/three_byte_0f38_opcodes.isa rename : src/arch/x86/isa/decoder/three_byte_opcodes.isa => src/arch/x86/isa/decoder/three_byte_0f3a_opcodes.isa
2013-11-26x86: Implementation of Int3 and Int_Ib in long modeChristian Menard
This is an implementation of the x86 int3 and int immediate instructions for long mode according to 'AMD64 Programmers Manual Volume 3'.
2013-02-19scons: Fix warnings issued by clang 3.2svn (XCode 4.6)Andreas Hansson
This patch fixes the warnings that clang3.2svn emit due to the "-Wall" flag. There is one case of an uninitialised value in the ARM neon ISA description, and then a whole range of unused private fields that are pruned.
2012-05-26CPU: Merge the predecoder and decoder.Gabe Black
These classes are always used together, and merging them will give the ISAs more flexibility in how they cache things and manage the process. --HG-- rename : src/arch/x86/predecoder_tables.cc => src/arch/x86/decoder_tables.cc
2012-03-19clang: Fix recently introduced clang compilation errorsAndreas Hansson
This patch makes the code compile with clang 2.9 and 3.0 again by making two very minor changes. Firt, it maintains a strict typing in the forward declaration of the BaseCPUParams. Second, it adds a FullSystemInt flag of the type unsigned int next to the boolean FullSystem flag. The FullSystemInt variable can be used in decode-statements (expands to switch statements) in the instruction decoder.
2011-09-30SE/FS: Use the new FullSystem constant where possible.Gabe Black
2011-09-19X86: Don't use "#if FULL_SYSTEM" in the X86 ISA description.Gabe Black
The decoder now checks the value of FULL_SYSTEM in a switch statement to decide whether to return a real syscall instruction or one that triggers syscall emulation (or a panic in FS mode). The switch statement should devolve into an if, and also should be optimized out since it's based on constant input.
2010-10-29X86: Make syscalls also serialize after.Gabe Black
2010-10-22X86: Make nop a regular, non-microcoded instruction.Gabe Black
Code in the CPUs that need a nop to carry a fault can't easily deal with a microcoded nop. This instruction format provides for one that isn't. --HG-- rename : src/arch/x86/isa/formats/syscall.isa => src/arch/x86/isa/formats/nop.isa
2010-10-22X86: Make syscall instructions non-speculative in SE.Gabe Black
2010-05-23copyright: Change HP copyright on x86 code to be more friendlyNathan Binkert
2009-11-05compile: compile on 32 bit hardwareNathan Binkert
2009-08-09X86: Decode byte sized singed divide as byte sized.Gabe Black
2009-08-05X86: Use the new forced folding mechanism for the SAHF and LAHF instructions.Gabe Black
2009-04-19X86: Implement far jmp.Gabe Black
2009-02-27X86: Implement the int system call interface in the decoder.Gabe Black
2008-06-12X86: Implement and hook up STI and CLI instructions.Gabe Black
2008-06-12X86: Implement a partial, sort of correct version of the protected mode ↵Gabe Black
variant of iret.
2007-12-01X86: First crack at far returns. This is grossly approximate.Gabe Black
--HG-- extra : convert_revision : 23da0338af1f7663ae5ddf2289fb45dd32f37c42
2007-12-01X86: Reorganize segmentation and implement segment selector movs.Gabe Black
--HG-- extra : convert_revision : 553c3ffeda1f5312cf02493f602e7d4ba2fe66e8
2007-10-19X86: Implement the PUSHF, POPF, SAHF, and LAHF instructions.Gabe Black
--HG-- extra : convert_revision : 37c63b1133022fa3432888592f8c84785fb95091
2007-10-19X86: Impelement the HLT instruction and fix the "halt" microop.Gabe Black
--HG-- extra : convert_revision : 932e5bb5bf3644f8468dba92177fb87cc54b891a
2007-10-19X86: Implement the ENTER instruction. This could probably be optimized by ↵Gabe Black
cleaning up the indexing in the main loop. --HG-- extra : convert_revision : ad2d560f2a6f36176b22b8510c58cd6fe5a2c9c2
2007-10-18X86: Replace "group10" placeholder with the corresponding instructions in ↵Gabe Black
the decoder. --HG-- extra : convert_revision : ffa8f7c4f8d1e381eefd29247ebd705863d385ad
2007-10-18X86: Implement the string IO instructions, ins and outs.Gabe Black
--HG-- extra : convert_revision : b021e70390d289b22a8e693cd8a99d6e7bd7d2b4
2007-10-18X86: Implement the undocumented SALC instruction which sets AL to 0xFF if ↵Gabe Black
CF=1 and 0x00 otherwise. --HG-- extra : convert_revision : 845d43c544e296d7595f54054906055a9f21ad9f
2007-10-18X86: Implement the XLAT instruction.Gabe Black
--HG-- extra : convert_revision : 22d7d9e79e722293b4dc1e66d8610301dc04c5fa
2007-10-18X86: Implement the BOUND instruction.Gabe Black
--HG-- extra : convert_revision : 7bcfa5b4a47d342bee267cc593a1bd4b4f31abe0
2007-10-18X86: Make "Inst" the default format instead of WarnUnimpl for one byte opcodes.Gabe Black
--HG-- extra : convert_revision : 591e67fc21f5b72977c5876e39f488494fda77c2
2007-10-18X86: Implement the in/out instructions. These will still need support from ↵Gabe Black
the TLB and memory system. --HG-- extra : convert_revision : a9503248ea9efca7e5247e4f2830967f428b8215
2007-10-18X86: Implement the LOOP instructions.Gabe Black
--HG-- extra : convert_revision : 3ccd0565c83b6d9c9b63f9f7ac2b67839a2c714f
2007-10-18X86: Attach the CMC instruction to the decoder.Gabe Black
--HG-- extra : convert_revision : 909661062017c7640c343e80431eaf365e8fcf53
2007-10-18X86: Implemented the jrcx instruction.Gabe Black
--HG-- extra : convert_revision : d738015ff33449e55d8f1624c8467c1bba193e16
2007-10-12X86: Added some new versions of MOV and a new argument type tag.Gabe Black
--HG-- extra : convert_revision : e21b2062d68baa983c7c631b3e1fe3149de56427
2007-10-12X86: Implemented LODS.Gabe Black
--HG-- extra : convert_revision : 4bd8f15bbc25f5dce16ea0504ad6dd21805fa56a
2007-10-02X86: Distinguish between the rep and repe prefixes.Gabe Black
STOS and MOVS only accept the rep prefix which always loops until rcx becomes 0. The other string instructions accept repe (same encoding as rep) and repne which also check the condition code flags each iteration. --HG-- extra : convert_revision : 544149f640302070810fb53e53bfeb0e87160ffc
2007-10-02X86: Hook in another version of the XCHG instruction.Gabe Black
--HG-- extra : convert_revision : 7b6f9cd2f59443622f6963dfee454175322c0ef5
2007-10-02X86: Implement MOVSGabe Black
--HG-- extra : convert_revision : 29147e1b86f7c54ce9b5ff68001725802c665fc0
2007-10-02X86: Implement STOS.Gabe Black
--HG-- extra : convert_revision : 95f3bf185f07fe644d6ab96bbb6e598e406b92f4
2007-09-04X86: Implement idiv and propogate the mul corner case fix.Gabe Black
--HG-- extra : convert_revision : 348aa081067728afa14dc5b609fc7e26dbc5fad5
2007-08-26X86: Implement cmps (string compare)Gabe Black
--HG-- extra : convert_revision : 0d6b783b2246b8ad8d91e4c63e407307ee11c651
2007-08-07X86: Implemented and hooked in SCAS (scan string)Gabe Black
Fixed the asz assembler symbol. Adjusted the condion checks to have appropriate options. Implemented the SCAS microcode. Attached SCAS into the decoder. --HG-- extra : convert_revision : 17bf9ddae6bc2069e43b076f8f83c4e54fb7966c
2007-08-04X86: Implement microops and instructions that manipulate the flags register.Gabe Black
--HG-- extra : convert_revision : 566841577bf4a98cac0b65292fe0f7daf89a9203
2007-07-30X86: Add decoding for x87 floating point.Gabe Black
--HG-- extra : convert_revision : 08f0f4a3d77a2c5eb9b5ca0cae7d0be9a72febec
2007-07-30X86: Attach the "DIV" instruction implementation to the decoder.Gabe Black
--HG-- extra : convert_revision : 8aef1c8d1ced2db998ed0d31241cadc17e19eadd
2007-07-30X86: Hook in the new instructions.Gabe Black
--HG-- extra : convert_revision : c4233001b35b52161083482841593ec28da6ff7d
2007-07-26X86: Hook in shift and rotate by one instructions, and NOT.Gabe Black
--HG-- extra : convert_revision : b3ab74e09f5cd02671cc6425c8cb8638bd58cbee
2007-07-24Hook in a bunch of new instructions, fix a few minor bugs, and expand out ↵Gabe Black
one of the prefix multiplexed opcode groups. --HG-- extra : convert_revision : b5afd54a180a8fbdf9a892b1a2316fcf0d11afc6
2007-07-23Implement pusha, popa, three operand imul, hook them into the decoder, and ↵Gabe Black
clean up the decoder a little. --HG-- extra : convert_revision : c1b8f0f433f629e4104e2b04addcdaabf57595e3
generated by cgit v1.2.3 (git 2.25.1) at 2024-08-13 14:53:26 +0000