Age | Commit message (Collapse) | Author |
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--HG--
extra : convert_revision : 48dae1f3c680636833c137fe6b95b37ae84e188c
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SparcStaticInst
--HG--
extra : convert_revision : 5d2eac9a4b3f0fe5e3c3554d91acf8fee368c9dc
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STOS and MOVS only accept the rep prefix which always loops until rcx becomes
0. The other string instructions accept repe (same encoding as rep) and repne
which also check the condition code flags each iteration.
--HG--
extra : convert_revision : 544149f640302070810fb53e53bfeb0e87160ffc
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repne prefixes.
--HG--
extra : convert_revision : 205fbbb947258bc0ef2915e22d5b32a3df1a1ce2
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--HG--
extra : convert_revision : 2c8eea425221d069a9bb888c8f18839843061899
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Make the emulation environment consider the rex prefix.
Implement and hook in forms of j, jmp, cmp, syscall, movzx
Added a format for an instruction to carry a call to the SE mode syscalls system
Made memory instructions which refer to the rip do so directly
Made the operand size overridable in the microassembly
Made the "ext" field of register operations 16 bits to hold a sparse encoding of flags to set or conditions to predicate on
Added an explicit "rax" operand for the syscall format
Implemented syscall returns.
--HG--
extra : convert_revision : ae84bd8c6a1d400906e17e8b8c4185f2ebd4c5f2
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--HG--
extra : convert_revision : bd0715b5b63665f9160082d67c5b5d90d2405c5c
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--HG--
rename : src/arch/x86/isa/base.isa => src/arch/x86/isa/outputblock.isa
extra : convert_revision : 7954e7d5eea3b5966c9e273a08bcd169a39f380c
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--HG--
extra : convert_revision : 99053414cef40f13c5226871a72909b2622d8c26
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the operand types they expect.
--HG--
extra : convert_revision : f9c8e694a8c0eb33b988657dca03ab495b65bee8
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src/arch/x86/isa/formats/multi.isa:
Make the formats use objects to pass around output code.
--HG--
extra : convert_revision : 428915bda22e848befac15097f56375c1818426e
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--HG--
extra : convert_revision : 58d37d8cc8e41c9640038d6dddae4cb5649638aa
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--HG--
extra : convert_revision : 7d1a43c5791a2e7e30533746da3dd7036a5b8799
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--HG--
extra : convert_revision : def1a30e54b59c718c451a631a1be6f8e787e843
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seperation between x86 specific parts, and those parts which are implemented in the isa description but could eventually be moved elsewhere.
--HG--
rename : src/arch/x86/isa/formats/macroop.isa => src/arch/x86/isa/macroop.isa
extra : convert_revision : 5ab40eedf574fce438d9fe90e00a496dc95c8bcf
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--HG--
extra : convert_revision : 3cf83c3e038fece6190dbb91f56deb0498c9a70d
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definitions to make figuring out what's what a little easier:
MicroOp: A single operation actually implemented in hardware.
MacroOp: A collection of microops which are executed as a unit.
Instruction: An architected instruction which can be implemented with a macroop or a microop.
--HG--
extra : convert_revision : 1cfc8409cc686c75220767839f55a30551aa6f13
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multiops do alot more of what they're supposed to (excluding memory operands), and microops are slightly more implemented.
--HG--
extra : convert_revision : 518059f47e11df50aa450d4a322ef2ac069c99c9
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instructions to return an instance of the right class. The code to decode register numbers and generate loads and stores still needs to be added. Also, a syntax for specifying operands as sources, destinations, or both needs to be established. Multipl microop instructions are also not handled, pending real macroop generation support.
--HG--
extra : convert_revision : 1a0a4b36afce8255e23e3cdd7a85c1392dda5f72
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different sets of inputs.
--HG--
extra : convert_revision : 6a5be61831588f801965dd4e80cb52f28911c320
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what bits decode is done on to reflect where clumps of instructions are.
--HG--
extra : convert_revision : 8768676eac25e6a4f0dc50ce2dc576bdcdd6e025
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adding predecoding functionality to x86.
src/arch/SConscript:
src/arch/alpha/utility.hh:
src/arch/mips/utility.hh:
src/arch/sparc/utility.hh:
src/cpu/base.hh:
src/cpu/o3/fetch.hh:
src/cpu/o3/fetch_impl.hh:
src/cpu/simple/atomic.cc:
src/cpu/simple/base.cc:
src/cpu/simple/base.hh:
src/cpu/static_inst.hh:
src/arch/alpha/predecoder.hh:
src/arch/mips/predecoder.hh:
src/arch/sparc/predecoder.hh:
Make the predecoder an object with it's own switched header file.
--HG--
extra : convert_revision : 77206e29089130e86b97164c30022a062699ba86
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--HG--
extra : convert_revision : a39a158fec4560f6eb7a6987592c473677c0b1ba
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