Age | Commit message (Collapse) | Author |
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--HG--
rename : src/arch/x86/isa/insts/sse/__init__.py => src/arch/x86/isa/insts/simd128/__init__.py
extra : convert_revision : efb4405aebaa4a04f33572e7d078ceca45872d9c
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Make instructions observe segment prefixes, default segment rules, segment
base addresses.
Also fix some microcode and add sib and riprel "keywords" to the x86
specialization of the microassembler.
--HG--
extra : convert_revision : be5a3b33d33f243ed6e1ad63faea8495e46d0ac9
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--HG--
extra : convert_revision : 3bdef3876c7b86bc93365edee876b74a201d625f
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--HG--
extra : convert_revision : c7e578aae8d36aa5d279fc27d6d7d28ed0a54181
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--HG--
extra : convert_revision : 4d626721ad54af9cbf5b0c07a3a6e8a05e4e9ab5
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implement NEG
--HG--
extra : convert_revision : da73ed6820d57f083c18f44b2fa868fc0976dd16
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--HG--
extra : convert_revision : a2d3068c5b487f4fa7bf5c9cebba7753bc390bfa
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versions. Added two of the shift microops.
--HG--
extra : convert_revision : 0b76953dbb1dc3366242d4d209cccebde86bbe4e
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--HG--
extra : convert_revision : adbff2e9b9952ec09853cc43d40243e7262410a7
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--HG--
extra : convert_revision : f94e391e36a47c2f5222f30d7e28f48f7875db58
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--HG--
extra : convert_revision : 005464e875ede1e37dfe0e0482c29fd793ca52be
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--HG--
extra : convert_revision : 99053414cef40f13c5226871a72909b2622d8c26
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an lea microop, move EmulEnv into it's own .cc and .hh.
--HG--
extra : convert_revision : 1212b8463eab1c1dcba7182c487d1e9184cf9bea
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Also, the code is now a single string which runs through the microcode assembler rather than docstrings associated with classes named after each architectural level instruction.
--HG--
extra : convert_revision : 20e6d6ac625dde8f1885acc445882096df562778
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