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path: root/src/arch/x86/isa/insts/general_purpose/control_transfer/interrupts_and_exceptions.py
AgeCommit message (Expand)Author
2018-03-14x86: Replace the .serializing directive with .serialize_(before|after).Gabe Black
2014-10-16arch: Use shared_ptr for all FaultsAndreas Hansson
2013-11-26x86: Implementation of Int3 and Int_Ib in long modeChristian Menard
2011-02-07X86: Read the LDT/GDT at CPL0 when executing an iret.Tim Harris
2010-08-23X86: Mark serializing macroops and regular instructions as such.Gabe Black
2010-05-23copyright: Change HP copyright on x86 code to be more friendlyNathan Binkert
2009-09-16X86: Fix checking the NT bit during an IRET.Gabe Black
2009-07-16X86: Fix a number of places where the wrong form of a microop was used.Gabe Black
2009-07-08X86: Fix a bug in IRET_PROT's microcode. The immediate form of sra was intended.Gabe Black
2009-02-25X86: Make the segment register reading microops use merge.Gabe Black
2009-02-25X86: Update CS later so stack accesses have the right permission checks.Gabe Black
2009-01-25X86: Fix a bug in the iret microcode.Gabe Black
2008-10-12X86: Fix the segment setting code in IRET, and make it restore the flags.Gabe Black
2008-10-12X86: Create a SeqOp class of microops and make Br one of them.Gabe Black
2008-09-10style: Remove non-leading tabs everywhere they shouldn't be. Developers shoul...Ali Saidi
2008-06-12X86: Implement a partial, sort of correct version of the protected mode varia...Gabe Black
2007-09-19X86: Put in stubs for x87, 64 bit and 128 bit SIMD instruction microcode.Gabe Black