| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2010-05-23 | copyright: Change HP copyright on x86 code to be more friendly | Nathan Binkert | |
| 2009-08-06 | X86: Make scas compare its operands in the right order. | Gabe Black | |
| 2009-02-01 | X86: Fix the microcode for the LODS instruction. | Gabe Black | |
| 2008-10-12 | X86: Create a SeqOp class of microops and make Br one of them. | Gabe Black | |
| 2008-06-12 | X86: Make string instructions work when rcx=0. | Gabe Black | |
| 2007-10-12 | X86: Implemented LODS. | Gabe Black | |
| --HG-- extra : convert_revision : 4bd8f15bbc25f5dce16ea0504ad6dd21805fa56a | |||
| 2007-10-02 | X86: Distinguish between the rep and repe prefixes. | Gabe Black | |
| STOS and MOVS only accept the rep prefix which always loops until rcx becomes 0. The other string instructions accept repe (same encoding as rep) and repne which also check the condition code flags each iteration. --HG-- extra : convert_revision : 544149f640302070810fb53e53bfeb0e87160ffc | |||
| 2007-10-02 | X86: Implement MOVS | Gabe Black | |
| --HG-- extra : convert_revision : 29147e1b86f7c54ce9b5ff68001725802c665fc0 | |||
| 2007-10-02 | X86: Implement STOS. | Gabe Black | |
| --HG-- extra : convert_revision : 95f3bf185f07fe644d6ab96bbb6e598e406b92f4 | |||
| 2007-09-19 | X86: Put in stubs for x87, 64 bit and 128 bit SIMD instruction microcode. | Gabe Black | |
| --HG-- rename : src/arch/x86/isa/insts/sse/__init__.py => src/arch/x86/isa/insts/simd128/__init__.py extra : convert_revision : efb4405aebaa4a04f33572e7d078ceca45872d9c | |||
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index : gem5 | |
| gem5 |
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