gem5 - gem5

Age	Commit message (Collapse)	Author
2007-09-19	X86: Put in stubs for x87, 64 bit and 128 bit SIMD instruction microcode.	Gabe Black
	--HG-- rename : src/arch/x86/isa/insts/sse/__init__.py => src/arch/x86/isa/insts/simd128/__init__.py extra : convert_revision : efb4405aebaa4a04f33572e7d078ceca45872d9c
2007-08-04	X86: Start implementing segmentation support.	Gabe Black
	Make instructions observe segment prefixes, default segment rules, segment base addresses. Also fix some microcode and add sib and riprel "keywords" to the x86 specialization of the microassembler. --HG-- extra : convert_revision : be5a3b33d33f243ed6e1ad63faea8495e46d0ac9
2007-08-04	X86: Add the arch_prctl system call and fix up some microcoding.	Gabe Black
	The arch_prctl system call is used to set and get the FS and GS segment bases. The FS segment is use for TLS, so glibc needs to be able to set it up. --HG-- extra : convert_revision : 79501491a15967a7a862add846ff88a934fb1b37
2007-07-29	X86: Make logic instructions flag setting work.	Gabe Black
	The instructions now ask for the appropriate flags to be set, and the microops do the "right thing" with the CF and OF flags, namely zero them. --HG-- extra : convert_revision : 85138a832f44c879bf8a11bd3a35b58be6272ef3
2007-07-26	Implement NOT	Gabe Black
	--HG-- extra : convert_revision : 09cbed6332224d06644d401f21178eb7914993df
2007-07-24	Clean out part of an old comment.	Gabe Black
	--HG-- extra : convert_revision : 6a6b2a06576ebe7383f7ce0e4e9f96bc96b84b56
2007-07-20	Define and fill out a lot of different instructions and instruction ↵	Gabe Black
	versions. Added two of the shift microops. --HG-- extra : convert_revision : 0b76953dbb1dc3366242d4d209cccebde86bbe4e
2007-06-21	Use the new symbols to clean up the assembler.	Gabe Black
	--HG-- extra : convert_revision : 005464e875ede1e37dfe0e0482c29fd793ca52be
2007-06-20	Implement rip relative addressing and put in some missing loads and stores.	Gabe Black
	--HG-- extra : convert_revision : 99053414cef40f13c5226871a72909b2622d8c26
2007-06-19	Get rid of the commented out versions of macroops which have been ↵	Gabe Black
	reimplemented. The comments are basically functioning like a todo list. --HG-- extra : convert_revision : cb07e3813f6cf882b4a5c77c498ffbca26adf586
2007-06-19	Get rid of the immediate and displacement components of the EmulEnv struct ↵	Gabe Black
	and use them directly out of the instruction. The extra copies are conceptually realistic but are just innefficient as implemented. Also don't use the zeroeth microcode register for general storage since it's now the zero register, and implement a load and a store microops. --HG-- extra : convert_revision : 0686296ca8b72940d961ecc6051063bfda1e932d
2007-06-14	Implement a handful more instructions and differentiate macroops based on ↵	Gabe Black
	the operand types they expect. --HG-- extra : convert_revision : f9c8e694a8c0eb33b988657dca03ab495b65bee8
2007-06-08	Move the microcode assembly to a python package instead of isa_parser files. ↵	Gabe Black
	Also, the code is now a single string which runs through the microcode assembler rather than docstrings associated with classes named after each architectural level instruction. --HG-- extra : convert_revision : 20e6d6ac625dde8f1885acc445882096df562778