summaryrefslogtreecommitdiff
path: root/src/arch/x86/isa/insts/logical.py
AgeCommit message (Collapse)Author
2007-07-20Define and fill out a lot of different instructions and instruction ↵Gabe Black
versions. Added two of the shift microops. --HG-- extra : convert_revision : 0b76953dbb1dc3366242d4d209cccebde86bbe4e
2007-06-21Use the new symbols to clean up the assembler.Gabe Black
--HG-- extra : convert_revision : 005464e875ede1e37dfe0e0482c29fd793ca52be
2007-06-20Implement rip relative addressing and put in some missing loads and stores.Gabe Black
--HG-- extra : convert_revision : 99053414cef40f13c5226871a72909b2622d8c26
2007-06-19Get rid of the commented out versions of macroops which have been ↵Gabe Black
reimplemented. The comments are basically functioning like a todo list. --HG-- extra : convert_revision : cb07e3813f6cf882b4a5c77c498ffbca26adf586
2007-06-19Get rid of the immediate and displacement components of the EmulEnv struct ↵Gabe Black
and use them directly out of the instruction. The extra copies are conceptually realistic but are just innefficient as implemented. Also don't use the zeroeth microcode register for general storage since it's now the zero register, and implement a load and a store microops. --HG-- extra : convert_revision : 0686296ca8b72940d961ecc6051063bfda1e932d
2007-06-14Implement a handful more instructions and differentiate macroops based on ↵Gabe Black
the operand types they expect. --HG-- extra : convert_revision : f9c8e694a8c0eb33b988657dca03ab495b65bee8
2007-06-08Move the microcode assembly to a python package instead of isa_parser files. ↵Gabe Black
Also, the code is now a single string which runs through the microcode assembler rather than docstrings associated with classes named after each architectural level instruction. --HG-- extra : convert_revision : 20e6d6ac625dde8f1885acc445882096df562778