Age | Commit message (Collapse) | Author |
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the TLB and memory system.
--HG--
extra : convert_revision : a9503248ea9efca7e5247e4f2830967f428b8215
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--HG--
extra : convert_revision : 2a1aa16709db940f5f40bbd84ca082f26b03b9c5
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The new implementation uses metaclass, and gives a lot more precise control
with a lot less verbosity. The flags/no flags reg/imm variants are all handled
by the same python class now which supplies a constructor to the right C++
class based on context.
--HG--
extra : convert_revision : 712e3ec6de7a5a038da083f79635fd7a687d56e5
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The labels on these lines will be associated with whatever the next microop
is.
--HG--
extra : convert_revision : 80c260e48ec1c16e6325061608e37c95a0610cfa
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Make instructions observe segment prefixes, default segment rules, segment
base addresses.
Also fix some microcode and add sib and riprel "keywords" to the x86
specialization of the microassembler.
--HG--
extra : convert_revision : be5a3b33d33f243ed6e1ad63faea8495e46d0ac9
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implement NEG
--HG--
extra : convert_revision : da73ed6820d57f083c18f44b2fa868fc0976dd16
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an lea microop, move EmulEnv into it's own .cc and .hh.
--HG--
extra : convert_revision : 1212b8463eab1c1dcba7182c487d1e9184cf9bea
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and use them directly out of the instruction. The extra copies are conceptually realistic but are just innefficient as implemented. Also don't use the zeroeth microcode register for general storage since it's now the zero register, and implement a load and a store microops.
--HG--
extra : convert_revision : 0686296ca8b72940d961ecc6051063bfda1e932d
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constructor. The intention is to allow them to modify the emulation environment struct before it's used to construct its microops.
--HG--
extra : convert_revision : b04fc9ead8e3322fc3af3f14d75e2206ddfbe561
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src/arch/x86/isa/macroop.isa:
Make microOp vs microop and macroOp vs macroop capitilization consistent. Also fill out the emulation environment handling a little more, and use an object to pass around output code.
src/arch/x86/isa/microops/base.isa:
Make microOp vs microop and macroOp vs macroop capitilization consistent. Also adjust python to C++ bool translation.
--HG--
extra : convert_revision : 6f4bacfa334c42732c845f9a7f211cbefc73f96f
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--HG--
extra : convert_revision : 7d1a43c5791a2e7e30533746da3dd7036a5b8799
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doesn't compile.
src/arch/x86/isa/decoder/one_byte_opcodes.isa:
src/arch/x86/isa/macroop.isa:
src/arch/x86/isa/main.isa:
src/arch/x86/isa/microasm.isa:
src/arch/x86/isa/microops/base.isa:
src/arch/x86/isa/microops/microops.isa:
src/arch/x86/isa/operands.isa:
src/arch/x86/isa/microops/regop.isa:
src/arch/x86/isa/microops/specop.isa:
Reworking x86's microcode system
--HG--
extra : convert_revision : cab66be59ed758b192226af17eddd5a86aa190f3
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--HG--
extra : convert_revision : def1a30e54b59c718c451a631a1be6f8e787e843
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seperation between x86 specific parts, and those parts which are implemented in the isa description but could eventually be moved elsewhere.
--HG--
rename : src/arch/x86/isa/formats/macroop.isa => src/arch/x86/isa/macroop.isa
extra : convert_revision : 5ab40eedf574fce438d9fe90e00a496dc95c8bcf
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