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path: root/src/arch/x86/isa/microops/ldstop.isa
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2011-07-02X86: Fix store microops so they don't drop faults in timing mode.Gabe Black
If a fault was returned by the CPU when a store initiated it's write, the store instruction would ignore the fault. This change fixes that.
2011-06-21X86: Eliminate an unused argument for building store microops.Gabe Black
2011-03-01X86: Mark IO reads and writes as non-speculative.Gabe Black
2011-03-01X86: Mark prefetches as such in their instruction and request flags.Gabe Black
2011-02-13X86: Don't read in dest regs if all bits are replaced.Gabe Black
In x86, 32 and 64 bit writes to registers in which registers appear to be 32 or 64 bits wide overwrite all bits of the destination register. This change removes false dependencies in these cases where the previous value of a register doesn't need to be read to write a new value. New versions of most microops are created that have a "Big" suffix which simply overwrite their destination, and the right version to use is selected during microop allocation based on the selected data size. This does not change the performance of the O3 CPU model significantly, I assume because there are other false dependencies from the condition code bits in the flags register.
2011-02-02X86: Get rid of the stupd microop.Gabe Black
2010-08-23X86: Get rid of the flagless microop constructor.Gabe Black
This will reduce clutter in the source and hopefully speed up compilation.
2010-08-23X86: Consolidate extra microop flags into one parameter.Gabe Black
This single parameter replaces the collection of bools that set up various flavors of microops. A flag parameter also allows other flags to be set like the serialize before/after flags, etc., without having to change the constructor.
2010-05-23copyright: Change HP copyright on x86 code to be more friendlyNathan Binkert
2009-11-08X86: Make x86 use PREFETCH instead of PF_EXCLUSIVE.Gabe Black
2009-08-23X86: Preserve the NO_ACCESS flag when giving CDA a specialized interface.Gabe Black
2009-07-16X86: Take limitted advantage of the compilers type checking for microop ↵Gabe Black
operands.
2009-04-23X86: Put the StoreCheck flag with the others, and don't collide with other ↵Gabe Black
flags.
2009-04-19X86: Implement the stul microop.Gabe Black
This microop does a store and unlocks the requested address. The RISC86 microop ISA doesn't seem to have an equivalent to this, so I'm guessing that the store following an ldstl is automatically unlocking. We don't do it this way for performance reasons since the behavior is the same.
2009-04-19X86: Implement the ldstl microop.Gabe Black
This microop does a load, checks that a store would succeed, and locks the requested address.
2009-04-19X86: LEA calculates an address before segmentation.Gabe Black
2009-02-27X86: Take address size into account when computing an effective address.Gabe Black
2009-02-27X86: Fix segment limit checks.Gabe Black
2009-02-25X86: Implement a basic prefetch instruction.Gabe Black
2009-02-25X86: Use the right portion of a register for stores.Gabe Black
2009-02-25X86: Add a flag to force memory accesses to happen at CPL 0.Gabe Black
2009-02-25X86: Make the stupd microop not update registers in initiateAcc.Gabe Black
2009-02-25CPU: Get rid of translate... functions from various interface classes.Gabe Black
2009-01-06X86: Autogenerate macroop generateDisassemble function.Gabe Black
2008-11-09X86: Fix completeAcc get call.Gabe Black
2008-02-26X86: Implement the INVLPG instruction and the TIA microop.Gabe Black
--HG-- extra : convert_revision : 31db1ee082f6c3ca5443cba1eb335e408661ead2
2007-11-12X86: Various fixes to indexing segmentation related registersGabe Black
--HG-- extra : convert_revision : 3d45da3a3fb38327582cfdfb72cfc4ce1b1d31af
2007-10-22X86: Implement the cda microop which checks if an address is legal to write to.Gabe Black
--HG-- extra : convert_revision : afe20649180dd59ad0702b98f7293be6c9226359
2007-10-21X86: Implement the stupd microop ("store with update", not "stupid") and use ↵Gabe Black
it in ENTER. --HG-- extra : convert_revision : 9151f701162d31ef26298497467c42b7b0ed85d5
2007-10-12X86: Implement MSR reads and writes and the wrsmr and rdmsr instructions.Gabe Black
There are no priviledge checks, so these instructions will all work in all modes. --HG-- extra : convert_revision : ff893eb569313d8aecbfffb47bcbd1c2d65cd393
2007-10-02X86: Implement the ldst microop and put it in existing microcode where ↵Gabe Black
appropriate. --HG-- extra : convert_revision : f08bd725d07a501bb7a0ce91590b5d37db99c6f3
2007-08-29X86: Add load and store microops that use the fp registers.Gabe Black
--HG-- extra : convert_revision : 153a055e888d8c47d59758a599dbd38f63008137
2007-08-26X86: Remove x86 code that attempted to fix misaligned accesses.Gabe Black
--HG-- extra : convert_revision : 42f68010e6498aceb7ed25da278093e99150e4df
2007-08-04X86: Make 64 bit unaligned accesses work as well as the other sizes.Gabe Black
There is a fundemental flaw in how unaligned accesses are supported, but this is still an improvement. --HG-- extra : convert_revision : 1c20b524ac24cd4a812c876b067495ee6a7ae29f
2007-08-04X86: Start implementing segmentation support.Gabe Black
Make instructions observe segment prefixes, default segment rules, segment base addresses. Also fix some microcode and add sib and riprel "keywords" to the x86 specialization of the microassembler. --HG-- extra : convert_revision : be5a3b33d33f243ed6e1ad63faea8495e46d0ac9
2007-08-01X86: Fix for compilation bug with new cache code.Gabe Black
--HG-- extra : convert_revision : 073c6db0796cd2c11b8293b382b438a2a959b821
2007-07-26X86: Add functions to read and write to an exec context.Gabe Black
These functions take care of calling the thread contexts read and write functions with the right sized data type, and handle unaligned accesses. --HG-- extra : convert_revision : b4b59ab2b22559333035185946bae3eab316c879
2007-07-20Make load and store ops use the appropriate sized data access.Gabe Black
--HG-- extra : convert_revision : 6b808586fab10ca433ef04b062bf701b906634b9
2007-07-19x86 fixesGabe Black
Make the emulation environment consider the rex prefix. Implement and hook in forms of j, jmp, cmp, syscall, movzx Added a format for an instruction to carry a call to the SE mode syscalls system Made memory instructions which refer to the rip do so directly Made the operand size overridable in the microassembly Made the "ext" field of register operations 16 bits to hold a sparse encoding of flags to set or conditions to predicate on Added an explicit "rax" operand for the syscall format Implemented syscall returns. --HG-- extra : convert_revision : ae84bd8c6a1d400906e17e8b8c4185f2ebd4c5f2
2007-07-18Make store microops actually store instead of load.Gabe Black
--HG-- extra : convert_revision : fe90f8adc96dd0e680cfa45e4c510a906046ae3d
2007-07-14Pull some hard coded base classes out of the isa description.Gabe Black
--HG-- rename : src/arch/x86/isa/base.isa => src/arch/x86/isa/outputblock.isa extra : convert_revision : 7954e7d5eea3b5966c9e273a08bcd169a39f380c
2007-06-20Make memory instructions work better, add more macroop implementations, add ↵Gabe Black
an lea microop, move EmulEnv into it's own .cc and .hh. --HG-- extra : convert_revision : 1212b8463eab1c1dcba7182c487d1e9184cf9bea
2007-06-19Get rid of the immediate and displacement components of the EmulEnv struct ↵Gabe Black
and use them directly out of the instruction. The extra copies are conceptually realistic but are just innefficient as implemented. Also don't use the zeroeth microcode register for general storage since it's now the zero register, and implement a load and a store microops. --HG-- extra : convert_revision : 0686296ca8b72940d961ecc6051063bfda1e932d
2007-06-13Move load/store microops into their own file. They still don't do anything, ↵Gabe Black
though. --HG-- extra : convert_revision : 251763c614b9056c3ca7a85ef92c416552da893f
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