gem5 - gem5

Age	Commit message (Expand)	Author
2012-09-11	x86: Add a separate register for D flag bit	Nilay Vaish
2012-05-22	X86: Split Condition Code register	Nilay Vaish
2011-02-06	x86: set IsCondControl flag for the appropriate microops	Brad Beckmann
2010-12-08	X86: Take advantage of new PCState syntax.	Gabe Black
2010-10-31	ISA,CPU,etc: Create an ISA defined PC type that abstracts out ISA behaviors.	Gabe Black
2010-08-23	X86: Get rid of the flagless microop constructor.	Gabe Black
2010-08-23	X86: Consolidate extra microop flags into one parameter.	Gabe Black
2010-05-23	copyright: Change HP copyright on x86 code to be more friendly	Nathan Binkert
2009-01-06	X86: Autogenerate macroop generateDisassemble function.	Gabe Black
2008-10-12	X86: Set the delayed commit flag in x86 microops appropriately.	Gabe Black
2008-10-12	X86: Create an eret microop which returns from ROM to combinational decoding.	Gabe Black
2008-10-12	X86: Make Br never report itself as the last microop.	Gabe Black
2008-10-12	X86: Create a SeqOp class of microops and make Br one of them.	Gabe Black