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path: root/src/arch/x86/isa/operands.isa
AgeCommit message (Expand)Author
2016-02-06x86: revamp cmpxchg8b/cmpxchg16b implementationAlexandru Dutu
2016-02-06arch, x86: add support for arrays as memory operandsSteve Reinhardt
2013-10-15arch/x86: add support for explicit CC register fileYasuko Eckert
2013-03-11x86: implement some of the x87 instructionsNilay Vaish
2013-01-15x86: implements emms instructionNilay Vaish
2013-01-15x86: implement fabs, fchs instructionsNilay Vaish
2012-09-11X86: make use of register predicationNilay Vaish
2012-09-11x86: Add a separate register for D flag bitNilay Vaish
2012-05-22X86: Split Condition Code registerNilay Vaish
2011-08-13X86: Use IsSquashAfter if an instruction could affect fetch translation.Gabe Black
2011-07-05ISA parser: Define operand types with a ctype directly.Gabe Black
2010-12-08X86: Take advantage of new PCState syntax.Gabe Black
2010-10-31ISA,CPU,etc: Create an ISA defined PC type that abstracts out ISA behaviors.Gabe Black
2010-05-23copyright: Change HP copyright on x86 code to be more friendlyNathan Binkert
2009-08-07X86: Implement shift right/left double microops.Gabe Black
2009-07-17X86: Tame the wilds of def operands.Gabe Black
2009-02-25X86: Add microops for reading/writing debug registers.Gabe Black
2009-02-01X86: Fix some incorrect register widths.Gabe Black
2009-01-06X86: Hook in the M5 pseudo insts.Gabe Black
2008-10-12X86: Add wrval/rdval microops for reading significant miscregs.Gabe Black
2008-10-12X86: Implement CPUID with a magical function instead of microcode.Gabe Black
2008-06-12X86: Keep handy values like the operating mode in one register.Gabe Black
2008-06-12X86: Change what the microop chks does.Gabe Black
2008-06-12X86: Add microops and supporting code to manipulate the whole rflags register.Gabe Black
2008-06-12X86: Add in some support for the tsc register.Gabe Black
2007-12-01X86: Reorganize segmentation and implement segment selector movs.Gabe Black
2007-12-01X86: Implement the lgdt instruction.Gabe Black
2007-12-01X86: Implement wrbase and wrlimit for loading pseudo descriptors.Gabe Black
2007-12-01X86: Separate the effective seg base and the "hidden" seg base.Gabe Black
2007-11-13X86: Make microcode use presegmentation RIPs and the rest of m5 use post segm...Gabe Black
2007-11-12X86: Implement the wrcr microop which writes a control register, and some con...Gabe Black
2007-09-19X86: Move the fp microops to their own file with their own base classes in C+...Gabe Black
2007-09-19X86: Put in the foundation for x87 stack based fp registers.Gabe Black
2007-09-13X86: Total overhaul of the division instructions and microops.Gabe Black
2007-09-06X86: Rework the multiplication microops so that they work like they would in ...Gabe Black
2007-08-29X86: Add operands to handle floating point registers.Gabe Black
2007-08-29X86: Flesh out register indexing constants.Gabe Black
2007-08-07X86: Make a microcode branch microop.Gabe Black
2007-08-04X86: Start implementing segmentation support.Gabe Black
2007-07-30X86: Take into account the regular registers and the microcode registers when...Gabe Black
2007-07-30Make the register indices use the appropriate "fold" bit.Gabe Black
2007-07-19x86 fixesGabe Black
2007-07-17Add in operand which holds the condition code bits of the flag register.Gabe Black
2007-06-19Get rid of the immediate and displacement components of the EmulEnv struct an...Gabe Black
2007-06-04Reworking x86's microcode system. This is a work in progress, and X86 doesn't...Gabe Black
2007-04-04The process of going from an instruction definition to an instruction to be r...Gabe Black
2007-03-29Add code to generate register and immediate based integer op microop classes.Gabe Black
2007-03-21Add a junk operand. With no operands, the parser breaks.Gabe Black
2007-03-05Stub decoder. This is probably even farther from finished than it looks...Gabe Black
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