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path: root/src/arch/x86/isa
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2007-06-14Fix limm.Gabe Black
--HG-- extra : convert_revision : ab76b11c2bb2f3abc0e7a84f7167d92d16ed074e
2007-06-14Implement a handful more instructions and differentiate macroops based on ↵Gabe Black
the operand types they expect. --HG-- extra : convert_revision : f9c8e694a8c0eb33b988657dca03ab495b65bee8
2007-06-14Make POP special case its dataSize to default to 64 bits in 64 bit mode.Gabe Black
--HG-- extra : convert_revision : 5c6251d962d9997676ffc795bb92eeb588caed39
2007-06-14Get rid of an unnecessary debug statement.Gabe Black
--HG-- extra : convert_revision : 0b306dd96f5358474ad6a8bf4a949c12bcd139cd
2007-06-14Get rid of some debug output and let macroops set headers in their ↵Gabe Black
constructor. The intention is to allow them to modify the emulation environment struct before it's used to construct its microops. --HG-- extra : convert_revision : b04fc9ead8e3322fc3af3f14d75e2206ddfbe561
2007-06-13Fix the operand type tag parser to recognize multi character register names.Gabe Black
--HG-- extra : convert_revision : e025620e29f2515d51240e96c4a05a4f74bdf72e
2007-06-13Partially implement "POP"Gabe Black
--HG-- extra : convert_revision : ba454579a6a82ce4924102a633e5758fb2a30b2d
2007-06-13Move load/store microops into their own file. They still don't do anything, ↵Gabe Black
though. --HG-- extra : convert_revision : 251763c614b9056c3ca7a85ef92c416552da893f
2007-06-13Fix the immediate version of register operations, and get their name to show ↵Gabe Black
up correctly. --HG-- extra : convert_revision : 9fc36b99c9027e35f22983d5d1e22c940fa093de
2007-06-12Minor comment fix up.Gabe Black
--HG-- extra : convert_revision : 20d517c4bc2aae54e53368c708b5abb27ed3a469
2007-06-12Make use of some of the REX prefix.Gabe Black
--HG-- extra : convert_revision : 948eceb59a1cd9b02ad9355dd5894af0bbec4e83
2007-06-12Flesh out the bitfields for prefixes.Gabe Black
--HG-- extra : convert_revision : 0956b3d3532cba3856deda914d7cc708377b701b
2007-06-12Add in MOV instructions.Gabe Black
--HG-- extra : convert_revision : 54a6b36dff3c15699faf2c767fc594359422c0ee
2007-06-12Fix up a comment that wasn't changed over to x86.Gabe Black
--HG-- extra : convert_revision : 58448b984447babba708b9dcb1b4939ed35308a6
2007-06-12Get rid of unnecessary namespace prototype.Gabe Black
--HG-- extra : convert_revision : 388c0d6f2af96c4d33c1fe5d42a21866a4d71556
2007-06-12Use objects to pass around output code, and fix/implement a few things.Gabe Black
src/arch/x86/isa/formats/multi.isa: Make the formats use objects to pass around output code. --HG-- extra : convert_revision : 428915bda22e848befac15097f56375c1818426e
2007-06-12Add an address size bitfield to the isa description and the ExtMachInstGabe Black
--HG-- extra : convert_revision : f8907ef5ef77e050eeb00d895263b49da4a9b6e9
2007-06-12Make microOp vs microop and macroOp vs macroop capitilization consistent.Gabe Black
src/arch/x86/isa/macroop.isa: Make microOp vs microop and macroOp vs macroop capitilization consistent. Also fill out the emulation environment handling a little more, and use an object to pass around output code. src/arch/x86/isa/microops/base.isa: Make microOp vs microop and macroOp vs macroop capitilization consistent. Also adjust python to C++ bool translation. --HG-- extra : convert_revision : 6f4bacfa334c42732c845f9a7f211cbefc73f96f
2007-06-08Fix another outdated comment.Gabe Black
--HG-- extra : convert_revision : 55f89d9f96734e96ae082399df6b0206d112cd6c
2007-06-08Adjust a few more comments.Gabe Black
--HG-- extra : convert_revision : 9b79ce72acf8932ce26e1744a149f2fd2435ea96
2007-06-08Fix up a potentially misleading comment.Gabe Black
--HG-- extra : convert_revision : 58d37d8cc8e41c9640038d6dddae4cb5649638aa
2007-06-08Fix the formatting on a comment.Gabe Black
--HG-- extra : convert_revision : 89636a7410dec54235416e3c16db98cc5eecf2b0
2007-06-08Clean up where files are included, and get rid of some cruft.Gabe Black
src/arch/x86/isa/main.isa: Clean up where files are included. --HG-- extra : convert_revision : 0528359432bf0fb9198b63de9611176bc78e07c7
2007-06-08Clean things up a little.Gabe Black
--HG-- extra : convert_revision : 62ad0839847db85738054da6f7da8a956b24143e
2007-06-08Move the microcode assembly to a python package instead of isa_parser files. ↵Gabe Black
Also, the code is now a single string which runs through the microcode assembler rather than docstrings associated with classes named after each architectural level instruction. --HG-- extra : convert_revision : 20e6d6ac625dde8f1885acc445882096df562778
2007-06-08Big changes to use the new microcode assembler.Gabe Black
--HG-- extra : convert_revision : 7d1a43c5791a2e7e30533746da3dd7036a5b8799
2007-06-08Fixed format arguments for XOR.Gabe Black
--HG-- extra : convert_revision : d64fe734fcdcc414ba9af9fc5f0f795429d5dad3
2007-06-08Add a bitfield to refer to the opSize member of the extMachInst.Gabe Black
--HG-- extra : convert_revision : 1854ebc00a9f3ae8c36cc579de6c3a2b48c0fdb6
2007-06-04Make limm (load immediate) microopGabe Black
--HG-- extra : convert_revision : f4883febd92cfade61c1a6a31fdb2d27296d9044
2007-06-04Reworking x86's microcode system. This is a work in progress, and X86 ↵Gabe Black
doesn't compile. src/arch/x86/isa/decoder/one_byte_opcodes.isa: src/arch/x86/isa/macroop.isa: src/arch/x86/isa/main.isa: src/arch/x86/isa/microasm.isa: src/arch/x86/isa/microops/base.isa: src/arch/x86/isa/microops/microops.isa: src/arch/x86/isa/operands.isa: src/arch/x86/isa/microops/regop.isa: src/arch/x86/isa/microops/specop.isa: Reworking x86's microcode system --HG-- extra : convert_revision : cab66be59ed758b192226af17eddd5a86aa190f3
2007-05-31x86 work that hadn't been checked in.Gabe Black
src/arch/x86/isa/decoder/one_byte_opcodes.isa: Give the "MOV" instruction the format of it's arguments. This will likely need to be completely overhauled in the near future. src/arch/x86/predecoder.cc: src/arch/x86/predecoder.hh: Make the predecoder explicitly reset itself rather than counting on it happening naturally. src/arch/x86/predecoder_tables.cc: Fix the immediate size table src/arch/x86/regfile.cc: nextnpc is bogus --HG-- extra : convert_revision : 0926701fedaab41817e64bb05410a25174484a5a
2007-04-10Include the new GenFault microop.Gabe Black
--HG-- extra : convert_revision : 6c943329525d2a01f35ad5e56ff91505d5011d7b
2007-04-10Reworked x86 a bitGabe Black
--HG-- extra : convert_revision : def1a30e54b59c718c451a631a1be6f8e787e843
2007-04-10Changed some instruction names to be in all caps, and "implemented" move to ↵Gabe Black
test the stub code for instructions. --HG-- extra : convert_revision : a377daf20545dfcbb0f97d8cafbe3d68416dc4b2
2007-04-10Added a class which lets you manipulate all the strings returned by the ↵Gabe Black
parser as a unit. --HG-- extra : convert_revision : eec4b188b44b80cee643542bbd1aaa139cbc4ef0
2007-04-09Accidentally didn't save when moving the specialization code out of here.Gabe Black
--HG-- extra : convert_revision : 1ffe0c497e10fef1eb84b3c97c00b98d820fbb97
2007-04-06Move the instruction specialization stuff out of the microassembler file, ↵Gabe Black
and added some comments to main.isa --HG-- extra : convert_revision : 1534ae7d5a9e95bf662d79a04f9286c227541c6c
2007-04-06Consolidated the microcode assembler to help separate it from more ↵Gabe Black
x86-centric stuff. --HG-- extra : convert_revision : 5e7e8026e24ce44a3dac4a358e0c3e5560685958
2007-04-06Refactored the x86 isa description some more. There should be more ↵Gabe Black
seperation between x86 specific parts, and those parts which are implemented in the isa description but could eventually be moved elsewhere. --HG-- rename : src/arch/x86/isa/formats/macroop.isa => src/arch/x86/isa/macroop.isa extra : convert_revision : 5ab40eedf574fce438d9fe90e00a496dc95c8bcf
2007-04-06Add in a stub merging functionGabe Black
--HG-- extra : convert_revision : 15e3cdb4ebcd31bc44204687ba59dde00c56c6be
2007-04-06Clean up the macroop code.Gabe Black
--HG-- extra : convert_revision : 3cf83c3e038fece6190dbb91f56deb0498c9a70d
2007-04-04The process of going from an instruction definition to an instruction to be ↵Gabe Black
returned by the decoder has been fleshed out more. The following steps describe how an instruction implementation becomes a StaticInst. 1. Microops are created. These are StaticInsts use templates to provide a basic form of polymorphism without having to make the microassembler smarter. 2. An instruction class is created which has a "templated" microcode program as it's docstring. The template parameters are refernced with ^ following by a number. 3. An instruction in the decoder references an instruction template using it's mnemonic. The parameters to it's format end up replacing the placeholders. These parameters describe a source for an operand which could be memory, a register, or an immediate. It it's a register, the register index is used. If it's memory, eventually a load/store will be pre/postpended to the instruction template and it's destination register will be used in place of the ^. If it's an immediate, the immediate is used. Some operand types, specifically those that come from the ModRM byte, need to be decoded further into memory vs. register versions. This is accomplished by making the decode_block text for these instructions another case statement based off ModRM. 4. Once all of the template parameters have been handled, the instruction goes throw the microcode assembler which resolves labels and creates a list of python op objects. If an operand is a register, it uses a % prefix, an immediate uses $, and a label uses @. If the operand is just letters, numbers, and underscores, it can appear immediately after the prefix. If it's not, it can be encolsed in non nested {}s. 5. If there is a single "op" object (which corresponds to a single microop) the decoder is set up to return it directly. If not, a macroop wrapper is created around it. In the future, I'm considering seperating the operand type specialization from the template substitution step. A problem this introduces is that either the template arguments need to be kept around for the specialization step, or they need to be re-extracted. Re-extraction might be the way to go so that the operand formats can be coded directly into the micro assembler template without having to pass them in as parameters. I don't know if that's actually useful, though. src/arch/x86/isa/decoder/one_byte_opcodes.isa: src/arch/x86/isa/microasm.isa: src/arch/x86/isa/microops/microops.isa: src/arch/x86/isa/operands.isa: src/arch/x86/isa/microops/base.isa: Implemented polymorphic microops and changed around the microcode assembler syntax. --HG-- extra : convert_revision : e341f7b8ea9350a31e586a3d33250137e5954f43
2007-04-04Reworking how x86's isa description works. I'm adopting the following ↵Gabe Black
definitions to make figuring out what's what a little easier: MicroOp: A single operation actually implemented in hardware. MacroOp: A collection of microops which are executed as a unit. Instruction: An architected instruction which can be implemented with a macroop or a microop. --HG-- extra : convert_revision : 1cfc8409cc686c75220767839f55a30551aa6f13
2007-04-03A batch of changes and fixes. Macroops are now generated automatically, ↵Gabe Black
multiops do alot more of what they're supposed to (excluding memory operands), and microops are slightly more implemented. --HG-- extra : convert_revision : 518059f47e11df50aa450d4a322ef2ac069c99c9
2007-03-29Made the MultiOp format do a little more. It now sets up single microop ↵Gabe Black
instructions to return an instance of the right class. The code to decode register numbers and generate loads and stores still needs to be added. Also, a syntax for specifying operands as sources, destinations, or both needs to be established. Multipl microop instructions are also not handled, pending real macroop generation support. --HG-- extra : convert_revision : 1a0a4b36afce8255e23e3cdd7a85c1392dda5f72
2007-03-29Add a microcode assembler. A microcode "program" is a series of statements. ↵Gabe Black
Each statement has an optional label at the beginning, a capitilized microcode class name which is roughly equivalent to a mnemonic in a regular ISA, and then an optional series of operands seperated by white space. The operands are either a decimal constant, a label, or a code fragment surrounded by non nested {}s. Labels are a letter or underscore followed by letters, underscores, or digits. The syntax for describing code segments might need to be changed if a need arrises to have {}s in the code itself. --HG-- extra : convert_revision : 8e5cfdd1a3c9a7e3731fdf6acd615ee82ac2b9b7
2007-03-29Fidget with the syntax of the MultiOp format in anticipation of making it ↵Gabe Black
actually work. --HG-- extra : convert_revision : f62a1f035cc11677df8eb5a839ca1247d819fab3
2007-03-29Add code to generate register and immediate based integer op microop classes.Gabe Black
--HG-- extra : convert_revision : 718f941da74dd3b4557cd21e1772879ac21aa9c6
2007-03-21Add a junk operand. With no operands, the parser breaks.Gabe Black
--HG-- extra : convert_revision : 7410fd3681ed3d9b1293d982ed5f3553a6c75f3f
2007-03-21Start implementing groups of instructions which do the same thing on ↵Gabe Black
different sets of inputs. --HG-- extra : convert_revision : 6a5be61831588f801965dd4e80cb52f28911c320
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