Age | Commit message (Collapse) | Author |
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STOS and MOVS only accept the rep prefix which always loops until rcx becomes
0. The other string instructions accept repe (same encoding as rep) and repne
which also check the condition code flags each iteration.
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Also clean things up as much as possible so that faulting won't break an
instruction. More microops which verify addresses are needed.
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appropriate.
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C++ and python.
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rename : src/arch/x86/isa/insts/sse/__init__.py => src/arch/x86/isa/insts/simd128/__init__.py
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overflow flags like they're supposed to.
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the patent.
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to be with the other ones.
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This fixes a problem where interpreting arbitrary bits as floating point would
change what the value was. These values are legitimate because the fp
registers could be used to move around arbitrary data.
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it still needed.
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The new implementation uses metaclass, and gives a lot more precise control
with a lot less verbosity. The flags/no flags reg/imm variants are all handled
by the same python class now which supplies a constructor to the right C++
class based on context.
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This includes the most of the SSE stuff, but not some of the "groups" of
instructions.
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machine returns.
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The labels on these lines will be associated with whatever the next microop
is.
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