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path: root/src/arch/x86/isa
AgeCommit message (Expand)Author
2017-12-23riscv,x86: Stop using the arch Nop machine instruction unnecessarily.Gabe Black
2017-12-14misc: Updates for gcc7.2 for x86Jason Lowe-Power
2017-12-14x86: Use operand size 4 when it would be 2 for cmpxchg8b.Gabe Black
2017-12-13arm,sparc,x86,base,cpu,sim: Replace the Twin(32|64)_t types with.Gabe Black
2017-12-13x86: Rework how "split" loads/stores are handled.Gabe Black
2017-12-06x86: Split apart x87's FSW and TOP, and add a missing break.Gabe Black
2017-12-05x86: LOOP's operand size defaults to 64 bits in 64 bit mode.Gabe Black
2017-12-04misc: Rename misc.(hh|cc) to logging.(hh|cc)Gabe Black
2017-11-07alpha,arm,mips,power,riscv,sparc,x86: Merge exec decl templates.Gabe Black
2017-11-02alpha,arm,mips,power,riscv,sparc,x86,isa: De-specialize ExecContexts.Gabe Black
2017-09-27arch-x86: fix CondInst decoding for MOV to Control RegistersBjoern A. Zeeb
2017-08-28x86: Use the new CondInst format for moves to/from control registers.Gabe Black
2017-08-28x86: Add a "CondInst" format for conditionally decoded instructions.Gabe Black
2017-07-05cpu: Simplify the rename interface and use RegIdRekai Gonzalez-Alberquilla
2017-07-05arch, cpu: Architectural Register structural indexingNathanael Premillieu
2017-05-26x86: Rework how VEX prefixes are decoded.Gabe Black
2017-05-16x86: Fix the multiplication microops.Gabe Black
2015-07-20syscall_emul: [patch 13/22] add system call retry capabilityBrandon Potter
2017-02-10x86: Fix implicit stack addressing in 64-bit modeJason Lowe-Power
2016-11-21x86: fix issue with casting in Cvtf2iTony Gutierrez
2016-10-26dev: Add m5 op to toggle synchronization for dist-gem5.Michael LeBeane
2016-02-06x86: revamp cmpxchg8b/cmpxchg16b implementationAlexandru Dutu
2016-02-06arch, x86: add support for arrays as memory operandsSteve Reinhardt
2016-02-06style: remove trailing whitespaceSteve Reinhardt
2016-01-17cpu. arch: add initiateMemRead() to ExecContext interfaceSteve Reinhardt
2016-01-07pseudo inst,util: Add optional key to initparam pseudo instructionGabor Dozsa
2015-10-06x86: implement rcpps and rcpss SSE instsSteve Reinhardt
2015-10-06x86: implement fild, fucomi, and fucomip x87 instsSteve Reinhardt
2015-07-20x86: x86 instruction-implementation bug fixesDavid Hashe
2015-07-17x86: decode instructions with vex prefixNilay Vaish
2015-07-04x86: Adjust the size of the values written to the x87 misc registersNikos Nikoleris
2015-04-29x86: change divide-by-zero fault to divide-errorNilay Vaish
2015-04-13x86: implements x87 mult/div instructionsNilay Vaish
2015-04-03x86: fix debug trace output for mwaitLena Olson
2015-03-23mem: rename Locked/LOCKED to LockedRMW/LOCKED_RMWSteve Reinhardt
2015-01-10x86 : fxsave and fxrestore missing template codeEmilio Castillo
2015-01-03x86: implements the simd128 ADDSUBPD instructionMaxime Martinasso
2014-12-04x86: Rework opcode parsing to support 3 byte opcodes properly.Gabe Black
2014-11-17x86: Fix setting segment bases in real mode.Gabe Black
2014-11-17x86: Fix some bugs in the real mode far jmp instruction.Gabe Black
2014-11-06x86 isa: This patch attempts an implementation at mwait.Marc Orr
2014-10-16arch: Use shared_ptr for all FaultsAndreas Hansson
2014-09-03x86: Flag instructions that call suspend as IsQuiesceMitch Hayenga
2014-09-01x86: set op class of two fp instructionsNilay Vaish
2014-05-09arch: teach ISA parser how to split code across filesCurtis Dunham
2014-05-09arch: remove inline specifiers on all inst constrs, all ISAsCurtis Dunham
2014-01-27x86: use lfpimm instead of limm for fptanNilay Vaish
2014-01-27x86: implements x87 add/sub instructionsNilay Vaish
2014-01-27x86: implements fxch instruction.Nilay Vaish
2014-01-27x86: correct error in emms instruction.Nilay Vaish