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path: root/src/arch/x86/isa
AgeCommit message (Collapse)Author
2009-04-19X86: Fix up a copyright.Gabe Black
2009-04-19X86: Recognize and handle the lock legacy prefix.Gabe Black
2009-04-19X86: Implement a locking version of XADD.Gabe Black
2009-04-19X86: Implement a locking version of BTC.Gabe Black
2009-04-19X86: Implement a locking version of BTR.Gabe Black
2009-04-19X86: Implement a locking version of CMPXCHG.Gabe Black
2009-04-19X86: Implement a locking version of BTS.Gabe Black
2009-04-19X86: Implement a locking version of DEC.Gabe Black
2009-04-19X86: Implement a locking version of INC.Gabe Black
2009-04-19X86: Implement a locking version of NEG.Gabe Black
2009-04-19X86: Implement a locking version of NOT.Gabe Black
2009-04-19X86: Implement a locking version of XCHG.Gabe Black
2009-04-19X86: Implement a locking version of XOR.Gabe Black
2009-04-19X86: Implement a locking version of SUB.Gabe Black
2009-04-19X86: Implement a locking version of AND.Gabe Black
2009-04-19X86: Implement a locking version of SBB.Gabe Black
2009-04-19X86: Implement a locking version of ADC.Gabe Black
2009-04-19X86: Implement a locking version of OR.Gabe Black
2009-04-19X86: Implement a locking version of ADD.Gabe Black
2009-04-19X86: Implement the stul microop.Gabe Black
This microop does a store and unlocks the requested address. The RISC86 microop ISA doesn't seem to have an equivalent to this, so I'm guessing that the store following an ldstl is automatically unlocking. We don't do it this way for performance reasons since the behavior is the same.
2009-04-19X86: Implement the ldstl microop.Gabe Black
This microop does a load, checks that a store would succeed, and locks the requested address.
2009-04-19X86: Make the TEST instruction set all the flags it's supposed to.Gabe Black
2009-04-19X86: Explicitly use the right width in a few places that need a 64 bit value.Gabe Black
2009-04-19X86: Implement far jmp.Gabe Black
2009-04-19X86: Fix a bug in the chks microop where it ignored that it found a fault.Gabe Black
2009-04-19X86: Make the interrupt entering microcode record the value to use, not ↵Gabe Black
actually use it.
2009-04-19X86: LEA calculates an address before segmentation.Gabe Black
2009-04-19X86: Implement the save machine status word instruction (SMSW).Gabe Black
2009-04-19X86: Implement the load machine status word instruction (LMSW).Gabe Black
2009-04-19X86: Only use %eax to select a function and look like we support sse2.Gabe Black
2009-04-19X86: Fix the mov to segment selector in real mode instruction microcode.Gabe Black
2009-04-19X86: Implement the INIT IPI.Gabe Black
2009-04-19X86: Fix the halt microop.Gabe Black
2009-02-27X86: Implement shrd.Gabe Black
2009-02-27X86: Set address size to 64 bits when generating addresses internally.Gabe Black
2009-02-27X86: Implement sysenter as a system call interface.Gabe Black
2009-02-27X86: Take address size into account when computing an effective address.Gabe Black
2009-02-27X86: Make instructions that use intseg preserve all 8 bytes of their addresses.Gabe Black
2009-02-27X86: Fix a decoder bug and add in some missing instructions.Gabe Black
2009-02-27X86: Respect segment override prefixes even when there's no ModRM byte.Gabe Black
2009-02-27X86: Fix segment limit checks.Gabe Black
2009-02-27X86: Compute shift instruction flags correctly.Gabe Black
2009-02-27X86: Implement the int system call interface in the decoder.Gabe Black
2009-02-25X86: Implement IST stack switching.Gabe Black
2009-02-25X86: Implement the lldt instruction.Gabe Black
2009-02-25X86: Add segmentation checks for ldt related descriptors and selectors.Gabe Black
2009-02-25X86: Make the TSS type check actually return a fault if it fails.Gabe Black
2009-02-25X86: Make rdcr use merge and the mov to control register instructions use ↵Gabe Black
the right operand size.
2009-02-25X86: Implement CLTS.Gabe Black
2009-02-25X86: Make the segment register reading microops use merge.Gabe Black
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