gem5 - gem5

Age	Commit message (Collapse)	Author
2009-07-08	Registers: Add a registers.hh file as an ISA switched header.	Gabe Black
	This file is for register indices, Num* constants, and register types. copyRegs and copyMiscRegs were moved to utility.hh and utility.cc. --HG-- rename : src/arch/alpha/regfile.hh => src/arch/alpha/registers.hh rename : src/arch/arm/regfile.hh => src/arch/arm/registers.hh rename : src/arch/mips/regfile.hh => src/arch/mips/registers.hh rename : src/arch/sparc/regfile.hh => src/arch/sparc/registers.hh rename : src/arch/x86/regfile.hh => src/arch/x86/registers.hh
2009-07-08	Registers: Move the PCs out of the ISAs and into the CPUs.	Gabe Black

2009-07-08	Registers: Eliminate the ISA defined integer register file.	Gabe Black

2009-07-08	Registers: Eliminate the ISA defined floating point register file.	Gabe Black

2009-07-08	Registers: Get rid of the float register width parameter.	Gabe Black

2009-07-08	Registers: Add an ISA object which replaces the MiscRegFile.	Gabe Black
	This object encapsulates (or will eventually) the identity and characteristics of the ISA in the CPU.
2009-04-21	Commit m5threads package.	Daniel Sanchez
	This patch adds limited multithreading support in syscall-emulation mode, by using the clone system call. The clone system call works for Alpha, SPARC and x86, and multithreaded applications run correctly in Alpha and SPARC.
2008-10-12	Get rid of old RegContext code.	Gabe Black

2008-10-12	Turn Interrupts objects into SimObjects. Also, move local APIC state into ↵	Gabe Black
	x86's Interrupts object.
2008-10-09	eventq: convert all usage of events to use the new API.	Nathan Binkert
	For now, there is still a single global event queue, but this is necessary for making the steps towards a parallelized m5.
2008-09-27	gcc: Add extra parens to quell warnings.	Nathan Binkert
	Even though we're not incorrect about operator precedence, let's add some parens in some particularly confusing places to placate GCC 4.3 so that we don't have to turn the warning off. Agreed that this is a bit of a pain for those users who get the order of operations correct, but it is likely to prevent bugs in certain cases.
2007-10-02	X86: Fix x87 floating point stack register indexing.	Gabe Black
	--HG-- extra : convert_revision : b515ec20cbfc50b38aa7da6cf4d465acf9054c08
2007-09-19	X86: Put in the foundation for x87 stack based fp registers.	Gabe Black
	--HG-- extra : convert_revision : 940f92efd4a9dc59106e991cc6d9836861ab69de
2007-07-30	Make the register indices use the appropriate "fold" bit.	Gabe Black
	--HG-- extra : convert_revision : 89e15e2ef1f709f2c09238b78f94505ce8ef146d
2007-05-31	x86 work that hadn't been checked in.	Gabe Black
	src/arch/x86/isa/decoder/one_byte_opcodes.isa: Give the "MOV" instruction the format of it's arguments. This will likely need to be completely overhauled in the near future. src/arch/x86/predecoder.cc: src/arch/x86/predecoder.hh: Make the predecoder explicitly reset itself rather than counting on it happening naturally. src/arch/x86/predecoder_tables.cc: Fix the immediate size table src/arch/x86/regfile.cc: nextnpc is bogus --HG-- extra : convert_revision : 0926701fedaab41817e64bb05410a25174484a5a
2007-03-07	MiscReg->MiscRegNoEffect, MiscRegWithEffect->MiscReg	Ali Saidi
	--HG-- extra : convert_revision : f799b65f1b2a6bf43605e6870b0f39b473dc492b
2007-03-05	Add some new source files.	Gabe Black
	--HG-- extra : convert_revision : 94f3f19eb91b7f54918640b7605008eb1fe75fc7