| Age | Commit message (Expand) | Author |
|---|---|---|
| 2018-03-15 | x86: Add bitfields which can gather/scatter bases and limits. | Gabe Black |
| 2017-12-04 | misc: Rename misc.(hh|cc) to logging.(hh|cc) | Gabe Black |
| 2016-02-06 | x86: create function to check miscreg validity | Steve Reinhardt |
| 2015-10-12 | misc: Remove redundant compiler-specific defines | Andreas Hansson |
| 2014-11-23 | x86: Segment initialization to support KvmCPU in SE | Alexandru Dutu |
| 2013-10-15 | arch/x86: add support for explicit CC register file | Yasuko Eckert |
| 2013-09-18 | x86: Expose the raw hash map of MSRs | Andreas Sandberg |
| 2013-01-15 | x86: implement fabs, fchs instructions | Nilay Vaish |
| 2012-09-11 | x86: Add a separate register for D flag bit | Nilay Vaish |
| 2012-05-22 | X86: Split Condition Code register | Nilay Vaish |
| 2012-03-19 | gcc: Clean-up of non-C++0x compliant code, first steps | Andreas Hansson |
| 2011-09-23 | X86: Move the MSR lookup table out of the TLB and into its own file. | Gabe Black |
| 2010-08-23 | X86: Create a directory for files that define register indexes. | Gabe Black |
 |
index : gem5 | |
| gem5 |
| summaryrefslogtreecommitdiff |