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path: root/src/arch/x86/tlb.cc
AgeCommit message (Collapse)Author
2009-08-01Clean up some inconsistencies with Request flags.Steve Reinhardt
2009-07-08Registers: Eliminate the ISA defined floating point register file.Gabe Black
2009-07-08Registers: Add an ISA object which replaces the MiscRegFile.Gabe Black
This object encapsulates (or will eventually) the identity and characteristics of the ISA in the CPU.
2009-04-26X86: Split out the internal memory space from the regular translate() and ↵Gabe Black
precompute mode.
2009-04-23X86: Put the StoreCheck flag with the others, and don't collide with other ↵Gabe Black
flags.
2009-04-19X86: Fix how the TLB handles the storecheck flag.Gabe Black
2009-04-19X86: Some segment selectors can be used when "NULL".Gabe Black
2009-04-08tlb: More fixing of unified TLBNathan Binkert
2009-04-08tlb: Don't separate the TLB classes into an instruction TLB and a data TLBGabe Black
2009-02-27quell gcc 4.3 warningNathan Binkert
2009-02-27X86: Fix segment limit checks.Gabe Black
2009-02-25X86: Actually check page protections.Gabe Black
2009-02-25X86: Add a flag to force memory accesses to happen at CPL 0.Gabe Black
2009-02-25X86: Make the X86 TLB take advantage of delayed translations, and get rid of ↵Gabe Black
the fake TLB miss faults.
2009-02-25CPU: Implement translateTiming which defers to translateAtomic, and convert ↵Gabe Black
the timing simple CPU to use it.
2009-02-25ISA: Replace the translate functions in the TLBs with translateAtomic.Gabe Black
2009-02-23X86: Pass whether an access was a read/write/fetch so faults can behave ↵Gabe Black
accordingly.
2009-02-01X86: Compute PCI config addresses correctly.Gabe Black
2008-11-10mem: update stuff for changes to Packet and RequestNathan Binkert
2008-11-02Add in Context IDs to the simulator. From now on, cpuId is almost never used,Lisa Hsu
the primary identifier for a hardware context should be contextId(). The concept of threads within a CPU remains, in the form of threadId() because sometimes you need to know which context within a cpu to manipulate.
2008-11-02make BaseCPU the provider of _cpuId, and cpuId() instead of being scatteredLisa Hsu
across the subclasses. generally make it so that member data is _cpuId and accessor functions are cpuId(). The ID val comes from the python (default -1 if none provided), and if it is -1, the index of cpuList will be given. this has passed util/regress quick and se.py -n4 and fs.py -n4 as well as standard switch.
2008-10-12X86: Make the local APIC accessible through the memory system directly, and ↵Gabe Black
make the timer work.
2008-10-12Turn Interrupts objects into SimObjects. Also, move local APIC state into ↵Gabe Black
x86's Interrupts object.
2008-06-12X86: Rename the divide count register to divide configuration.Gabe Black
2008-06-12X86: Change how segment loading is performed.Gabe Black
2008-06-12X86: In non 64bit mode, throw a fault when a NULL segment is accessed.Gabe Black
2008-06-12X86: Have all 8 machine check registers since the kernel assumes they're there.Gabe Black
2008-06-12X86: Bypass unaligned access support for register addressed MSRs.Gabe Black
2008-06-12X86: Remove enforcement of APIC register access alignment. Panic if more ↵Gabe Black
than one register is accessed at a time.
2008-03-01X86: Don't map the local APIC into the physical address space in SE mode.Gabe Black
--HG-- extra : convert_revision : b7103974b12130bbf43583c4cb5294b808add208
2008-02-26X86: Put in initial implementation of the local APIC.Gabe Black
--HG-- extra : convert_revision : 1708a93d96b819e64ed456c75dbb5325ac8114a8
2008-02-26X86: Implement the INVLPG instruction and the TIA microop.Gabe Black
--HG-- extra : convert_revision : 31db1ee082f6c3ca5443cba1eb335e408661ead2
2008-02-26TLB: Make a TLB base class and put a virtual demapPage function in it.Gabe Black
--HG-- extra : convert_revision : cc0e62a5a337fd5bf332ad33bed61c0d505a936f
2008-02-26X86: Get PCI config space to work, and adjust address space prefix numbering ↵Gabe Black
scheme. --HG-- extra : convert_revision : 2b382f478ee8cde3a35aa4c105196f200bc7afa6
2008-01-12X86: Make the IO ports work using extra physical address lines. Add a serial ↵Gabe Black
port. --HG-- extra : convert_revision : a14cb4fc9afedfc0ff58b11a7f8fb5516d462cc6
2007-12-01X86: Reorganize segmentation and implement segment selector movs.Gabe Black
--HG-- extra : convert_revision : 553c3ffeda1f5312cf02493f602e7d4ba2fe66e8
2007-11-12X86: Separate out the page table walker into it's own cc and hh.Gabe Black
--HG-- extra : convert_revision : cbc3af01ca3dc911a59224a574007c5c0bcf6042
2007-11-12X86: Fix a stupid typo where WRMSR and RDMSR were switched, and add a debug ↵Gabe Black
statement. --HG-- extra : convert_revision : f1eb17291f4c01f3c0fa8f99650bc1edf09d21de
2007-11-12X86: Implement tlb invalidation and make it happen some of the times it should.Gabe Black
--HG-- extra : convert_revision : 376516d33cd539fa526c834ef2b2c33069af3040
2007-11-12X86: Work on the page table walker, TLB, and related faults.Gabe Black
--HG-- extra : convert_revision : 9edde958b7e571c07072785f18f9109f73b8059f
2007-11-12X86: Implement a page table walker.Gabe Black
--HG-- extra : convert_revision : 36bab5750100318faa9ba7178dc2e38590053aec
2007-11-12X86: Various fixes to indexing segmentation related registersGabe Black
--HG-- extra : convert_revision : 3d45da3a3fb38327582cfdfb72cfc4ce1b1d31af
2007-10-25TLB: Fix serialization issues with the tlb entries and make the page table ↵Gabe Black
store the process, not the system. --HG-- extra : convert_revision : 2421af11f62f60fb48faeee6bddadac2987df0e8
2007-10-12X86: Implement MSR reads and writes and the wrsmr and rdmsr instructions.Gabe Black
There are no priviledge checks, so these instructions will all work in all modes. --HG-- extra : convert_revision : ff893eb569313d8aecbfffb47bcbd1c2d65cd393
2007-10-07X86: Work on the x86 tlb.Gabe Black
--HG-- extra : convert_revision : a08a5cb049a6030ba9fd56a89383d56026238dbf
2007-10-02Merge with head.Gabe Black
--HG-- extra : convert_revision : 1aa0e4569a7c10e6a395c2c951ac29275b5bcf59
2007-10-02X86: Start implementing the x86 tlb which will handle segmentation ↵Gabe Black
permission and limit checks and paging. --HG-- extra : convert_revision : 6072f7d9eecbaa066d39d6da7f0180ea4a2615af
2007-09-28Rename cycles() function to ticks()Ali Saidi
--HG-- extra : convert_revision : 790eddb793d4f5ba35813d001037bd8601bd76a5
2007-09-24X86: Get X86_FS to compile.Gabe Black
--HG-- extra : convert_revision : fb973bcf13648876d5691231845dd47a2be50f01
2007-08-31X86: Get x86 to compile again after the simobject constructor change.Gabe Black
--HG-- extra : convert_revision : 17a3e16e849bee88892223f0c993b19c15daa554