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path: root/src/arch/x86/tlb.cc
AgeCommit message (Expand)Author
2017-07-17x86: Add stats to X86 TLBSwapnil Haria
2017-02-23x86: remove redundant condition check in tlb codeBrandon Potter
2016-11-09style: [patch 3/22] reduce include dependencies in some headersBrandon Potter
2016-11-09style: [patch 1/22] use /r/3648/ to reorganize includesBrandon Potter
2016-09-13x86: Force strict ordering for memory mapped m5opsMichael LeBeane
2016-08-15cpu, arch: fix the type used for the request flagsNikos Nikoleris
2015-07-07sim: Refactor the serialization base classAndreas Sandberg
2015-05-05mem, cpu: Add a separate flag for strictly ordered memoryAndreas Sandberg
2014-11-23kvm, x86: Adding support for SE mode executionAlexandru Dutu
2014-10-16arch: Use shared_ptr for all FaultsAndreas Hansson
2013-10-15mem: Use a flag instead of address bit 63 for generic IPRsAndreas Sandberg
2013-09-30x86: Add support for m5ops through a memory mapped interfaceAndreas Sandberg
2013-08-07x86: add tlb checkpointingNilay Vaish
2013-06-03arch: Create a method to finalize physical addressesAndreas Sandberg
2013-01-07arch: Add support for invalidating TLBs when drainingAndreas Sandberg
2012-10-15Port: Add protocol-agnostic ports in the port hierarchyAndreas Hansson
2012-06-07X86 TLB: Add a missing = signNilay Vaish
2012-06-07X86 TLB: Fix for gcc 4.4.3Jayneel Gandhi
2012-05-28X86: Use the HandyM5Reg to avoid a register read and some logic in the TLB.Gabe Black
2012-05-27X86: Truncate addresses to 32 bits except in 64 bit mode, not long mode.Gabe Black
2012-04-24X86: Clear out duplicate TLB entries when adding a new one.Gabe Black
2012-04-14X86: Use the AddrTrie class to implement the TLB.Gabe Black
2012-03-31X86: Fix address size handling so real mode works properly.Gabe Black
2012-03-30MEM: Introduce the master/slave port sub-classes in C++William Wang
2012-03-19gcc: Clean-up of non-C++0x compliant code, first stepsAndreas Hansson
2012-03-09CheckerCPU: Add function stubs to non-ARM ISA source to compile with CheckerCPUGeoffrey Blake
2012-03-01x86: Fix x86 TLB and WalkerNilay Vaish
2012-01-07Another merge with the main repository.Gabe Black
2012-01-05X86 TLB: Move a DPRINTF to its correct placeNilay Vaish
2011-10-30X86: Get rid of more uses of FULL_SYSTEM.Gabe Black
2011-10-30SE/FS: Make getProcessPtr available in both modes, and get rid of FULL_SYSTEMs.Gabe Black
2011-10-13X86: Turn on the page table walker in SE mode.Gabe Black
2011-09-23X86: Move the MSR lookup table out of the TLB and into its own file.Gabe Black
2011-09-09Stack: Tidy up some comments, a warning, and make stack extension consistent.Gabe Black
2011-09-05X86,TLB: Make sure the "delayedResponse" variable is always set.Gabe Black
2011-09-02TLB: comments and a helpful warning.Lisa Hsu
2011-04-15trace: reimplement the DTRACE function so it doesn't use a vectorNathan Binkert
2011-04-15includes: sort all includesNathan Binkert
2011-03-01Spelling: Fix the a spelling error by changing mmaped to mmapped.Gabe Black
2011-02-27X86: If PCI config space is disabled, pass through to regular IO addresses.Gabe Black
2011-02-07X86: Obey the wp bit of CR0.Tim Harris
2011-02-06x86: Timing support for pagetable walkerJoel Hestness
2011-01-03Make commenting on close namespace brackets consistent.Steve Reinhardt
2010-11-23X86: Obey the PCD (cache disable) bit in the page tables.Gabe Black
2010-11-22X86: Mark IO space accesses as uncachable.Gabe Black
2010-10-31ISA,CPU,etc: Create an ISA defined PC type that abstracts out ISA behaviors.Gabe Black
2010-08-23X86: Create a directory for files that define register indexes.Gabe Black
2010-08-23X86: Make the TLB fault instead of panic when something is unmapped in SE mode.Gabe Black
2010-05-23copyright: Change HP copyright on x86 code to be more friendlyNathan Binkert
2009-11-08X86: Don't panic on faults on prefetches in SE mode.Gabe Black