summaryrefslogtreecommitdiff
path: root/src/arch/x86/tlb.cc
AgeCommit message (Expand)Author
2009-04-19X86: Fix how the TLB handles the storecheck flag.Gabe Black
2009-04-19X86: Some segment selectors can be used when "NULL".Gabe Black
2009-04-08tlb: More fixing of unified TLBNathan Binkert
2009-04-08tlb: Don't separate the TLB classes into an instruction TLB and a data TLBGabe Black
2009-02-27quell gcc 4.3 warningNathan Binkert
2009-02-27X86: Fix segment limit checks.Gabe Black
2009-02-25X86: Actually check page protections.Gabe Black
2009-02-25X86: Add a flag to force memory accesses to happen at CPL 0.Gabe Black
2009-02-25X86: Make the X86 TLB take advantage of delayed translations, and get rid of ...Gabe Black
2009-02-25CPU: Implement translateTiming which defers to translateAtomic, and convert t...Gabe Black
2009-02-25ISA: Replace the translate functions in the TLBs with translateAtomic.Gabe Black
2009-02-23X86: Pass whether an access was a read/write/fetch so faults can behave accor...Gabe Black
2009-02-01X86: Compute PCI config addresses correctly.Gabe Black
2008-11-10mem: update stuff for changes to Packet and RequestNathan Binkert
2008-11-02Add in Context IDs to the simulator. From now on, cpuId is almost never used,Lisa Hsu
2008-11-02make BaseCPU the provider of _cpuId, and cpuId() instead of being scatteredLisa Hsu
2008-10-12X86: Make the local APIC accessible through the memory system directly, and m...Gabe Black
2008-10-12Turn Interrupts objects into SimObjects. Also, move local APIC state into x86...Gabe Black
2008-06-12X86: Rename the divide count register to divide configuration.Gabe Black
2008-06-12X86: Change how segment loading is performed.Gabe Black
2008-06-12X86: In non 64bit mode, throw a fault when a NULL segment is accessed.Gabe Black
2008-06-12X86: Have all 8 machine check registers since the kernel assumes they're there.Gabe Black
2008-06-12X86: Bypass unaligned access support for register addressed MSRs.Gabe Black
2008-06-12X86: Remove enforcement of APIC register access alignment. Panic if more than...Gabe Black
2008-03-01X86: Don't map the local APIC into the physical address space in SE mode.Gabe Black
2008-02-26X86: Put in initial implementation of the local APIC.Gabe Black
2008-02-26X86: Implement the INVLPG instruction and the TIA microop.Gabe Black
2008-02-26TLB: Make a TLB base class and put a virtual demapPage function in it.Gabe Black
2008-02-26X86: Get PCI config space to work, and adjust address space prefix numbering ...Gabe Black
2008-01-12X86: Make the IO ports work using extra physical address lines. Add a serial ...Gabe Black
2007-12-01X86: Reorganize segmentation and implement segment selector movs.Gabe Black
2007-11-12X86: Separate out the page table walker into it's own cc and hh.Gabe Black
2007-11-12X86: Fix a stupid typo where WRMSR and RDMSR were switched, and add a debug s...Gabe Black
2007-11-12X86: Implement tlb invalidation and make it happen some of the times it should.Gabe Black
2007-11-12X86: Work on the page table walker, TLB, and related faults.Gabe Black
2007-11-12X86: Implement a page table walker.Gabe Black
2007-11-12X86: Various fixes to indexing segmentation related registersGabe Black
2007-10-25TLB: Fix serialization issues with the tlb entries and make the page table st...Gabe Black
2007-10-12X86: Implement MSR reads and writes and the wrsmr and rdmsr instructions.Gabe Black
2007-10-07X86: Work on the x86 tlb.Gabe Black
2007-10-02Merge with head.Gabe Black
2007-10-02X86: Start implementing the x86 tlb which will handle segmentation permission...Gabe Black
2007-09-28Rename cycles() function to ticks()Ali Saidi
2007-09-24X86: Get X86_FS to compile.Gabe Black
2007-08-31X86: Get x86 to compile again after the simobject constructor change.Gabe Black
2007-08-26Address translation: Make the page table more flexible.Gabe Black
2007-08-26Address Translation: Make SE mode use an actual TLB/MMU for translation like FS.Gabe Black